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authorSumeet R Pawnikar <sumeet.r.pawnikar@intel.com>2020-10-01 20:02:52 +0530
committerTim Wawrzynczak <twawrzynczak@chromium.org>2020-10-12 15:34:10 +0000
commit1447c4310e6c31f1d0f536f0a56ca2184b840dd2 (patch)
tree3661a6a4d1ce6cfb4ebbf3fd7ea84e18aab3d854 /src/mainboard/google/dedede
parent249bb8df0aa7f218c58199281495fc6fcbb45a8f (diff)
mb/google/dedede: refactor DPTF section for simpler overrides
Refactor DPTF section of code under the baseboard devicetree and overridetree. This makes override mechanism more simpler, because not all the DPTF fields need to be overridden. BUG=None BRANCH=None TEST=Built and tested on dedede system Change-Id: I8e7cfe60c010ed4c07f9089325b289519e861f84 Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46090 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/dedede')
-rw-r--r--src/mainboard/google/dedede/variants/baseboard/devicetree.cb52
-rw-r--r--src/mainboard/google/dedede/variants/drawcia/overridetree.cb66
2 files changed, 71 insertions, 47 deletions
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
index b2ed21afc3..2b7a5139c6 100644
--- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
@@ -189,27 +189,39 @@ chip soc/intel/jasperlake
device pci 00.0 on end # Host Bridge
device pci 02.0 on end # Integrated Graphics Device
device pci 04.0 on
+ # Default DPTF Policy for all Dedede boards if not overridden
chip drivers/intel/dptf
- register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 90, 10000)"
- register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 60000)"
- register "policies.passive[2]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 55, 15000)"
-
- register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 105, SHUTDOWN)"
- register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN)"
- register "policies.critical[2]" = "DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN)"
-
- register "controls.power_limits.pl1" = "{
- .min_power = 3000,
- .max_power = 6000,
- .time_window_min = 1 * MSECS_PER_SEC,
- .time_window_max = 1 * MSECS_PER_SEC,
- .granularity = 200,}"
- register "controls.power_limits.pl2" = "{
- .min_power = 6000,
- .max_power = 20000,
- .time_window_min = 1 * MSECS_PER_SEC,
- .time_window_max = 1 * MSECS_PER_SEC,
- .granularity = 1000,}"
+ ## Passive Policy
+ register "policies.passive" = "{
+ [0] = DPTF_PASSIVE(CPU, CPU, 90, 10000),
+ [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 60000),
+ [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 55, 15000)
+ }"
+
+ ## Critical Policy
+ register "policies.critical" = "{
+ [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
+ [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN),
+ [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN)
+ }"
+
+ ## Power Limits Control
+ register "controls.power_limits" = "{
+ .pl1 = {
+ .min_power = 3000,
+ .max_power = 6000,
+ .time_window_min = 1 * MSECS_PER_SEC,
+ .time_window_max = 1 * MSECS_PER_SEC,
+ .granularity = 200,
+ },
+ .pl2 = {
+ .min_power = 6000,
+ .max_power = 20000,
+ .time_window_min = 1 * MSECS_PER_SEC,
+ .time_window_max = 1 * MSECS_PER_SEC,
+ .granularity = 1000,
+ }
+ }"
register "options.tsr[0].desc" = ""Memory""
register "options.tsr[1].desc" = ""Ambient""
diff --git a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb
index 715da7aaa2..044ff08c2f 100644
--- a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb
@@ -67,42 +67,54 @@ chip soc/intel/jasperlake
device domain 0 on
device pci 04.0 on
chip drivers/intel/dptf
-
+ # Default DPTF Policy for all drawcia boards if not overridden
register "options.tsr[0].desc" = ""Memory""
register "options.tsr[1].desc" = ""Ambient""
register "options.tsr[2].desc" = ""Charger""
register "options.tsr[3].desc" = ""5V regulator""
- register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 80, 1000)"
- register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 70, 4000)"
- register "policies.passive[2]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 51, 1000)"
- register "policies.passive[3]" = "DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000)"
- register "policies.passive[4]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 60, 1000)"
+ ## Passive Policy
+ register "policies.passive" = "{
+ [0] = DPTF_PASSIVE(CPU, CPU, 80, 1000),
+ [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 70, 4000),
+ [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 51, 1000),
+ [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000),
+ [4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 60, 1000)
+ }"
- register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 119, SHUTDOWN)"
- register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 115, SHUTDOWN)"
- register "policies.critical[2]" = "DPTF_CRITICAL(TEMP_SENSOR_1, 115, SHUTDOWN)"
- register "policies.critical[3]" = "DPTF_CRITICAL(TEMP_SENSOR_2, 115, SHUTDOWN)"
- register "policies.critical[4]" = "DPTF_CRITICAL(TEMP_SENSOR_3, 115, SHUTDOWN)"
+ ## Critical Policy
+ register "policies.critical" = "{
+ [0] = DPTF_CRITICAL(CPU, 119, SHUTDOWN),
+ [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 115, SHUTDOWN),
+ [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 115, SHUTDOWN),
+ [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 115, SHUTDOWN),
+ [4] = DPTF_CRITICAL(TEMP_SENSOR_3, 115, SHUTDOWN)
+ }"
- register "controls.power_limits.pl1" = "{
- .min_power = 4800,
- .max_power = 6000,
- .time_window_min = 1 * MSECS_PER_SEC,
- .time_window_max = 1 * MSECS_PER_SEC,
- .granularity = 200,}"
- register "controls.power_limits.pl2" = "{
- .min_power = 6000,
- .max_power = 20000,
- .time_window_min = 1 * MSECS_PER_SEC,
- .time_window_max = 1 * MSECS_PER_SEC,
- .granularity = 1000,}"
+ register "controls.power_limits" = "{
+ .pl1 = {
+ .min_power = 4800,
+ .max_power = 6000,
+ .time_window_min = 1 * MSECS_PER_SEC,
+ .time_window_max = 1 * MSECS_PER_SEC,
+ .granularity = 200,
+ },
+ .pl2 = {
+ .min_power = 6000,
+ .max_power = 20000,
+ .time_window_min = 1 * MSECS_PER_SEC,
+ .time_window_max = 1 * MSECS_PER_SEC,
+ .granularity = 1000,
+ }
+ }"
## Charger Performance Control (Control, mA)
- register "controls.charger_perf[0]" = "{ 255, 3000 }"
- register "controls.charger_perf[1]" = "{ 24, 1500 }"
- register "controls.charger_perf[2]" = "{ 16, 1000 }"
- register "controls.charger_perf[3]" = "{ 8, 500 }"
+ register "controls.charger_perf" = "{
+ [0] = { 255, 3000 },
+ [1] = { 24, 1500 },
+ [2] = { 16, 1000 },
+ [3] = { 8, 500 }
+ }"
device generic 0 on end
end