diff options
| author | Frank Wu <frank_wu@compal.corp-partner.google.com> | 2021-08-16 15:13:57 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-08-28 17:43:07 +0000 |
| commit | ba1091a0e6f61979c70d11932dbd83cf50fb5213 (patch) | |
| tree | 49187a9a0883ae32a8818f1cce7b4e804bfe5fdc /src/mainboard/google/dedede/variants | |
| parent | dd6c7331ac6692816484438f2f2950060c6e55c9 (diff) | |
mb/google/dedede/var/driblee: Configure USB port settings
Update the USB port configuration based on driblee schematic.
USB2 [0]: USB Type C Port 0
USB2 [1]: None
USB2 [2]: USB Type A Port 1
USB2 [3]: None
USB2 [4]: None
USB2 [5]: Camera UFC
USB2 [6]: None
USB2 [7]: None
USB3 [0]: USB Type C Port 0 (M/B side)
USB3 [1]: None
USB3 [2]: USB Type A Port 0 (M/B side)
USB3 [3]: None
BUG=b:195622487, b:191732473
BRANCH=keeby
TEST=FW_NAME="driblee" emerge-keeby coreboot
Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Change-Id: Id9f4f8db98cb20db1c3936c65689a847a7802b9a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56997
Reviewed-by: Shou-Chieh Hsu <shouchieh@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/dedede/variants')
| -rw-r--r-- | src/mainboard/google/dedede/variants/driblee/overridetree.cb | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/driblee/overridetree.cb b/src/mainboard/google/dedede/variants/driblee/overridetree.cb index cbad0d29a0..6fbd537bcc 100644 --- a/src/mainboard/google/dedede/variants/driblee/overridetree.cb +++ b/src/mainboard/google/dedede/variants/driblee/overridetree.cb @@ -1,5 +1,14 @@ chip soc/intel/jasperlake + # USB Port Configuration + register "usb2_ports[1]" = "USB2_PORT_EMPTY" # None + register "usb2_ports[3]" = "USB2_PORT_EMPTY" # None + register "usb2_ports[4]" = "USB2_PORT_EMPTY" # None + register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Camera (UFC) + register "usb2_ports[6]" = "USB2_PORT_EMPTY" # None + register "usb3_ports[1]" = "USB3_PORT_EMPTY" # None + register "usb3_ports[3]" = "USB3_PORT_EMPTY" # None + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | @@ -32,6 +41,29 @@ chip soc/intel/jasperlake register "SerialIoGSpiCsMode[PchSerialIoIndexGSPI0]" = "0" device domain 0 on + device pci 14.0 on + chip drivers/usb/acpi + device usb 0.0 on + chip drivers/usb/acpi + device usb 2.1 off end + end + chip drivers/usb/acpi + device usb 2.3 off end + end + chip drivers/usb/acpi + register "desc" = ""Camera (UFC)"" + register "type" = "UPC_TYPE_INTERNAL" + device usb 2.5 on end + end + chip drivers/usb/acpi + device usb 3.1 off end + end + chip drivers/usb/acpi + device usb 3.3 off end + end + end + end + end # USB xHCI device pci 15.0 on end device pci 1e.2 off end # GSPI 0 device pci 1f.0 on |