diff options
| author | Tao Xia <xiatao5@huaqin.corp-partner.google.com> | 2021-06-04 10:55:11 +0800 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2021-06-09 03:59:36 +0000 |
| commit | 736c94f3618468d56f763398295e7a2bc90170b8 (patch) | |
| tree | 6e68a8f3728cc64d430d23803c70a69b7b0a3bba /src/mainboard/google/dedede/variants | |
| parent | cbf5a02e4fe12abca273e529106a05b99f871a3a (diff) | |
mb/google/dedede/var/storo: Update gpio setting
Correct GPIO settings as below reason:
1. GPP_D19/GPP_D20/GPP_D21 not being used but set to NF.
2. GPP_B7 should configure as WWAN SAR detect ODL, but set to GPI
BUG=b:188956448
BRANCH=dedede
TEST=The LTE DPR pin can be pulled down normally when someone
get close to the P-sensor antenna.
Signed-off-by: Tao Xia <xiatao5@huaqin.corp-partner.google.com>
Change-Id: Idc214fcd9c4631368a71f4d59bb644df739982ab
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55175
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard/google/dedede/variants')
| -rw-r--r-- | src/mainboard/google/dedede/variants/storo/gpio.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/src/mainboard/google/dedede/variants/storo/gpio.c b/src/mainboard/google/dedede/variants/storo/gpio.c index 3d830e7e55..a73caf5fc0 100644 --- a/src/mainboard/google/dedede/variants/storo/gpio.c +++ b/src/mainboard/google/dedede/variants/storo/gpio.c @@ -8,14 +8,20 @@ static const struct pad_config gpio_table[] = { /* A10 : WWAN_EN */ PAD_CFG_GPO(GPP_A10, 1, PWROK), - /* B7 : PCIE_CLKREQ2_N ==> WWAN_SAR_DETECT_ODL*/ - PAD_CFG_GPI_IRQ_WAKE(GPP_B7, NONE, DEEP, LEVEL, INVERT), + /* B7 : WWAN_SAR_DETECT_R_ODL */ + PAD_CFG_GPO(GPP_B7, 1, DEEP), /* C12 : AP_PEN_DET_ODL */ PAD_CFG_GPI_GPIO_DRIVER(GPP_C12, UP_20K, DEEP), /* D15 : EN_PP3300_CAMERA */ PAD_CFG_GPO(GPP_D15, 1, PLTRST), + /* D19 : WWAN_WLAN_COEX1 */ + PAD_NC(GPP_D19, NONE), + /* D20 : WWAN_WLAN_COEX2 */ + PAD_NC(GPP_D20, NONE), + /* D21 : WWAN_WLAN_COEX3 */ + PAD_NC(GPP_D21, NONE), /* D22 : AP_I2C_SUB_SDA*/ PAD_CFG_NF(GPP_D22, NONE, DEEP, NF1), /* D23 : AP_I2C_SUB_SCL */ |