diff options
| author | Tao Xia <xiatao5@huaqin.corp-partner.google.com> | 2021-06-10 21:28:32 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-06-21 05:40:12 +0000 |
| commit | 69984cf733ff5b1b4be39878cd538399dbcc3552 (patch) | |
| tree | 6782f263b800f6d443cc4c7584fac03b601d8d37 /src/mainboard/google/dedede/variants | |
| parent | 0185489c0d4e0b0823047a5a617bed3b6742e04c (diff) | |
mb/google/dedede/var/storo: Update DPTF parameters
Update DPTF parameters from internal thermal team.
BUG=b:180875582
BRANCH=dedede
TEST=emerge-dedede coreboot
Signed-off-by: Tao Xia <xiatao5@huaqin.corp-partner.google.com>
Change-Id: Ica2f2856000c8dcbf4d23b7b4a3c479dc7d4862b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55388
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Diffstat (limited to 'src/mainboard/google/dedede/variants')
| -rw-r--r-- | src/mainboard/google/dedede/variants/storo/overridetree.cb | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/storo/overridetree.cb b/src/mainboard/google/dedede/variants/storo/overridetree.cb index 6336192579..bcd094b48d 100644 --- a/src/mainboard/google/dedede/variants/storo/overridetree.cb +++ b/src/mainboard/google/dedede/variants/storo/overridetree.cb @@ -63,7 +63,50 @@ chip soc/intel/jasperlake [PchSerialIoIndexI2C5] = PchSerialIoPci, }" + register "power_limits_config" = "{ + .tdp_pl1_override = 7, + .tdp_pl2_override = 20, + }" + + register "tcc_offset" = "5" # TCC of 100C + device domain 0 on + device pci 04.0 on + chip drivers/intel/dptf + ## Passive Policy + register "policies.passive" = "{ + [0] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 60, 3000), + [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 60, 3000), + [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 60, 3000),}" + ## Critical Policy + register "policies.critical" = "{ + [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), + [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 80, SHUTDOWN), + [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 90, SHUTDOWN), + [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 90, SHUTDOWN),}" + register "controls.power_limits.pl1" = "{ + .min_power = 3000, + .max_power = 7000, + .time_window_min = 28 * MSECS_PER_SEC, + .time_window_max = 28 * MSECS_PER_SEC, + .granularity = 125,}" + register "controls.power_limits.pl2" = "{ + .min_power = 20000, + .max_power = 20000, + .time_window_min = 28 * MSECS_PER_SEC, + .time_window_max = 32 * MSECS_PER_SEC, + .granularity = 1000,}" + ## Charger Performance Control (Control, mA) + register "controls.charger_perf" = "{ + [0] = { 255, 3000 }, + [1] = { 32, 2000 }, + [2] = { 24, 1500 }, + [3] = { 16, 1000 }, + [4] = { 8, 500 } + }" + device generic 0 on end + end + end # SA Thermal device device pci 05.0 on # IPU - MIPI Camera chip drivers/intel/mipi_camera register "acpi_uid" = "0x50000" |