diff options
| author | Teddy Shih <teddyshih@ami.corp-partner.google.com> | 2022-04-25 19:33:01 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-04-27 18:03:13 +0000 |
| commit | 263f143c4429a256734c3ac5b2caa1a0725c5002 (patch) | |
| tree | 971378822ecf7c19c2f1a56f9afc867e2971ec0e /src/mainboard/google/dedede/variants | |
| parent | dec327b03b2fbf6dc6f89599107f645ed6a5396f (diff) | |
mb/google/dedede/beadrix: Update DPTF setting
Update DPTF Policy and temperature sensor values from thermal team.
BRANCH=dedede
BUG=b:204229229
TEST=on beadrix, verified by FW_NAME=beadrix emerge-dedede coreboot.
Signed-off-by: Teddy Shih <teddyshih@ami.corp-partner.google.com>
Change-Id: I34c1298dc8412121f8688842bb8d69d7fafa46f6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63824
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ivan Chen <yulunchen@google.com>
Reviewed-by: Super Ni <super.ni@intel.corp-partner.google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard/google/dedede/variants')
| -rw-r--r-- | src/mainboard/google/dedede/variants/beadrix/overridetree.cb | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/google/dedede/variants/beadrix/overridetree.cb b/src/mainboard/google/dedede/variants/beadrix/overridetree.cb index 8a12e4140d..f3f5d5615d 100644 --- a/src/mainboard/google/dedede/variants/beadrix/overridetree.cb +++ b/src/mainboard/google/dedede/variants/beadrix/overridetree.cb @@ -48,14 +48,14 @@ chip soc/intel/jasperlake register "options.tsr[0].desc" = ""Memory"" register "options.tsr[1].desc" = ""CPU"" register "policies.passive" = "{ - [0] = DPTF_PASSIVE(CPU, CPU, 80, 4000), - [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 110, 6000), - [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 110, 4000), + [0] = DPTF_PASSIVE(CPU, CPU, 85, 4000), + [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 4000), + [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 75, 4000), }" register "policies.critical" = "{ - [0] = DPTF_CRITICAL(CPU, 110, SHUTDOWN), - [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 110, SHUTDOWN), - [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 110, SHUTDOWN), + [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), + [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 95, SHUTDOWN), + [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 95, SHUTDOWN), }" register "controls.power_limits" = "{ .pl1 = { |