diff options
author | Tao Xia <xiatao5@huaqin.corp-partner.google.com> | 2021-06-04 17:15:44 +0800 |
---|---|---|
committer | Werner Zeh <werner.zeh@siemens.com> | 2021-06-07 04:55:31 +0000 |
commit | 42b6309595bfcf8b3ab9926033e98d682322a8cb (patch) | |
tree | a21f3653c602eb6bcddb7921e6f02f32424060e0 /src/mainboard/google/dedede/variants | |
parent | 0caf80d8aaa383d40618343f14ed78774108053d (diff) |
mb/google/dedede/var/sasukette: Update DPTF parameters
Update DPTF parameters from internal thermal team.
BUG=b:180875580
BRANCH=dedede
TEST=emerge-dedede coreboot
Signed-off-by: Tao Xia <xiatao5@huaqin.corp-partner.google.com>
Change-Id: Id18a38cddbcacbafbe2c54d94dbda5e00de02b3b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55208
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Evan Green <evgreen@chromium.org>
Diffstat (limited to 'src/mainboard/google/dedede/variants')
-rw-r--r-- | src/mainboard/google/dedede/variants/sasukette/overridetree.cb | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/sasukette/overridetree.cb b/src/mainboard/google/dedede/variants/sasukette/overridetree.cb index 0f483655af..16bf54646d 100644 --- a/src/mainboard/google/dedede/variants/sasukette/overridetree.cb +++ b/src/mainboard/google/dedede/variants/sasukette/overridetree.cb @@ -74,7 +74,42 @@ chip soc/intel/jasperlake .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, }" # Camera + register "power_limits_config" = "{ + .tdp_pl1_override = 7, + .tdp_pl2_override = 20, + }" + + register "tcc_offset" = "10" # TCC of 95C + device domain 0 on + device pci 04.0 on + chip drivers/intel/dptf + ## Passive Policy + register "policies.passive" = "{ + [0] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 52, 5000), + [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 54, 5000), + [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 54, 5000),}" + ## Critical Policy + register "policies.critical" = "{ + [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), + [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN), + [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 90, SHUTDOWN), + [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 90, SHUTDOWN),}" + register "controls.power_limits.pl1" = "{ + .min_power = 5000, + .max_power = 7000, + .time_window_min = 28 * MSECS_PER_SEC, + .time_window_max = 28 * MSECS_PER_SEC, + .granularity = 250,}" + register "controls.power_limits.pl2" = "{ + .min_power = 20000, + .max_power = 20000, + .time_window_min = 28 * MSECS_PER_SEC, + .time_window_max = 32 * MSECS_PER_SEC, + .granularity = 1000,}" + device generic 0 on end + end + end # SA Thermal device device pci 14.0 on chip drivers/usb/acpi device usb 0.0 on |