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author | Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> | 2020-04-07 10:21:59 +0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-04-14 10:07:50 +0000 |
commit | 3fe5f2cfa4a091b237562851796d1415451d462f (patch) | |
tree | 03d625fd87ca2868d5f505234612eb31337429f6 /src/mainboard/google/dedede/variants/waddledoo | |
parent | 53e82f67eabbc64f8344e97a066fbc7c619b5dd6 (diff) |
mb/google/dedede: Enable SIS touchscreen for Waddledoo
Add SiS9813 USI touchscreen support.
BUG=b:152936541
TEST="emerge-dedede coreboot chromeos-bootimage", build successful.
Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Change-Id: Id04c46c763fdf68418bf2e97be4c8bb6bb73c749
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40250
Reviewed-by: Marco Chen <marcochen@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/dedede/variants/waddledoo')
-rw-r--r-- | src/mainboard/google/dedede/variants/waddledoo/overridetree.cb | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb b/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb index cb21c63b0f..cc9e651252 100644 --- a/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb +++ b/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb @@ -55,6 +55,25 @@ chip soc/intel/jasperlake device i2c 15 on end end end #I2C 0 + device pci 15.2 on + chip drivers/i2c/hid + register "generic.hid" = ""SIS6496"" + register "generic.desc" = ""SIS Touchscreen"" + register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_D4_IRQ)" + register "generic.probed" = "1" + register "generic.reset_gpio" = + "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D5)" + register "generic.reset_delay_ms" = "100" + register "generic.stop_gpio" = + "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A11)" + register "generic.enable_gpio" = + "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)" + register "generic.enable_delay_ms" = "7" + register "generic.has_power_resource" = "1" + register "hid_desc_reg_offset" = "0x00" + device i2c 5c on end + end + end # I2C 2 device pci 1c.7 on chip drivers/intel/wifi register "wake" = "GPE0_DW2_03" |