diff options
author | Tao Xia <xiatao5@huaqin.corp-partner.google.com> | 2020-12-08 14:43:31 +0800 |
---|---|---|
committer | Hung-Te Lin <hungte@chromium.org> | 2020-12-21 02:37:39 +0000 |
commit | f20151dfaa4ffbee9b58aa86d77320c45bd81707 (patch) | |
tree | 41c6d05706cf59bc1efa3f8750c6814301327dff /src/mainboard/google/dedede/variants/storo/memory/dram_id.generated.txt | |
parent | 8dad8248d46e6c5d4b4708cff93789719ca7c4ee (diff) |
mb/google/dedede/var/storo: Generate SPD ID for supported memory parts
Add supported memory parts in the mem_parts_used.txt and generate the
SPD ID for the memory parts. The memory parts being added are:
MT53E512M32D2NP-046 WT:E
H9HCNNNBKMMLXR-NEE
MT53E1G32D2NP-046 WT:A
H9HCNNNCPMMLXR-NEE
BUG=None
TEST=Build the storo board.
Signed-off-by: Tao Xia <xiatao5@huaqin.corp-partner.google.com>
Change-Id: Ifd935865927bb9fccf95eb4924ca6986d0c19442
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48447
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Xuxin Xiong <xuxinxiong@huaqin.corp-partner.google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard/google/dedede/variants/storo/memory/dram_id.generated.txt')
-rw-r--r-- | src/mainboard/google/dedede/variants/storo/memory/dram_id.generated.txt | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/storo/memory/dram_id.generated.txt b/src/mainboard/google/dedede/variants/storo/memory/dram_id.generated.txt index fa247902ee..ad6374dcce 100644 --- a/src/mainboard/google/dedede/variants/storo/memory/dram_id.generated.txt +++ b/src/mainboard/google/dedede/variants/storo/memory/dram_id.generated.txt @@ -1 +1,5 @@ DRAM Part Name ID to assign +MT53E512M32D2NP-046 WT:E 0 (0000) +H9HCNNNBKMMLXR-NEE 0 (0000) +MT53E1G32D2NP-046 WT:A 1 (0001) +H9HCNNNCPMMLXR-NEE 2 (0010) |