diff options
author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2020-02-11 11:53:47 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-02-17 15:36:16 +0000 |
commit | 55c8702324c4ea99fe5f5a741b0c95c361f83672 (patch) | |
tree | cc817c232a0fa91a9a94710e05e4d3b177f4f569 /src/mainboard/google/dedede/variants/baseboard/devicetree.cb | |
parent | 95ea799019fdb7c0baee70bd07196910dbc0cd95 (diff) |
mb/google/dedede: Configure I2C ports
Enable I2C ports that are used. Add GPIO configuration for the I2C
ports. Enable config items that are required for I2C HID & Generic devices.
BUG=None
TEST=Build the mainboard.
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: I12e974530fb5f61fae5d12cadbb3f928e617d73a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38847
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Diffstat (limited to 'src/mainboard/google/dedede/variants/baseboard/devicetree.cb')
-rw-r--r-- | src/mainboard/google/dedede/variants/baseboard/devicetree.cb | 40 |
1 files changed, 30 insertions, 10 deletions
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index 4b2a3c5b13..2d57a14f25 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -20,11 +20,11 @@ chip soc/intel/tigerlake register "pmc_gpe0_dw2" = "GPP_H" register "SerialIoI2cMode" = "{ - [PchSerialIoIndexI2C0] = PchSerialIoDisabled, - [PchSerialIoIndexI2C1] = PchSerialIoDisabled, - [PchSerialIoIndexI2C2] = PchSerialIoDisabled, - [PchSerialIoIndexI2C3] = PchSerialIoDisabled, - [PchSerialIoIndexI2C4] = PchSerialIoDisabled, + [PchSerialIoIndexI2C0] = PchSerialIoPci, + [PchSerialIoIndexI2C1] = PchSerialIoPci, + [PchSerialIoIndexI2C2] = PchSerialIoPci, + [PchSerialIoIndexI2C3] = PchSerialIoPci, + [PchSerialIoIndexI2C4] = PchSerialIoPci, [PchSerialIoIndexI2C5] = PchSerialIoDisabled, }" @@ -60,12 +60,32 @@ chip soc/intel/tigerlake #| | required to set up a BAR | #| | for TPM communication | #| | before memory is up | + #| I2C0 | Trackpad | + #| I2C1 | Digitizer | + #| I2C2 | Touchscreen | + #| I2C3 | Camera | + #| I2C4 | Audio | #+-------------------+---------------------------+ register "common_soc_config" = "{ .gspi[0] = { .speed_mhz = 1, .early_init = 1, }, + .i2c[0] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[1] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[2] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[3] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[4] = { + .speed = I2C_SPEED_FAST, + }, }" device domain 0 on @@ -80,16 +100,16 @@ chip soc/intel/tigerlake device pci 14.2 off end # PMC SRAM device pci 14.3 off end # CNVi wifi device pci 14.5 off end # SDCard - device pci 15.0 off end # I2C 0 - device pci 15.1 off end # I2C 1 - device pci 15.2 off end # I2C 2 - device pci 15.3 off end # I2C 3 + device pci 15.0 on end # I2C 0 + device pci 15.1 on end # I2C 1 + device pci 15.2 on end # I2C 2 + device pci 15.3 on end # I2C 3 device pci 16.0 off end # HECI 1 device pci 16.1 off end # HECI 2 device pci 16.4 off end # HECI 3 device pci 16.5 off end # HECI 4 device pci 17.0 off end # SATA - device pci 19.0 off end # I2C 4 + device pci 19.0 on end # I2C 4 device pci 19.1 off end # I2C 5 device pci 19.2 on end # UART 2 device pci 1a.0 off end # eMMC |