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authorKarthikeyan Ramasubramanian <kramasub@google.com>2020-02-06 17:58:07 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-02-17 15:35:53 +0000
commit2a3cef29d81ab9200b8226be41a09f975c9ed485 (patch)
treee7f1dbd350864861a33c39264b56f7c139c8e899 /src/mainboard/google/dedede/Kconfig
parent47607bdc83558f63b917b4de2e35741fe5366469 (diff)
mb/google/dedede: Enable AP <-> H1 Communication
Turn on the H1 device in the devicetree. Configure the concerned GPIOs and enable the required config items. BUG=None TEST=Build the mainboard. Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Change-Id: I37972635454cd0d35608623e7be4110012ace658 Reviewed-on: https://review.coreboot.org/c/coreboot/+/38772 Reviewed-by: Justin TerAvest <teravest@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/dedede/Kconfig')
-rw-r--r--src/mainboard/google/dedede/Kconfig10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/Kconfig b/src/mainboard/google/dedede/Kconfig
index 5254d16b7c..9b5bd4af5e 100644
--- a/src/mainboard/google/dedede/Kconfig
+++ b/src/mainboard/google/dedede/Kconfig
@@ -1,11 +1,14 @@
config BOARD_GOOGLE_BASEBOARD_DEDEDE
def_bool n
+ select DRIVERS_SPI_ACPI
select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_BOARDID
select EC_GOOGLE_CHROMEEC_ESPI
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select MAINBOARD_HAS_CHROMEOS
+ select MAINBOARD_HAS_SPI_TPM_CR50
+ select MAINBOARD_HAS_TPM2
select SOC_INTEL_JASPERLAKE
if BOARD_GOOGLE_BASEBOARD_DEDEDE
@@ -25,6 +28,9 @@ config DEVICETREE
string
default "variants/baseboard/devicetree.cb"
+config DRIVER_TPM_SPI_BUS
+ default 0x1
+
config MAINBOARD_DIR
string
default "google/dedede"
@@ -41,6 +47,10 @@ config MAX_CPUS
int
default 4
+config TPM_TIS_ACPI_INTERRUPT
+ int
+ default 4 # GPE0_DW0_4 (GPP_B4)
+
config UART_FOR_CONSOLE
int
default 2