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| author | Matt DeVillier <matt.devillier@gmail.com> | 2017-08-20 17:56:48 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-09-16 22:31:32 +0000 |
| commit | 4f20a4ae47492fc86293f1c6aed063177992fbaf (patch) | |
| tree | 0fdb68c963612f0b4cbc901efbf04293719b9ea2 /src/mainboard/google/cyan/chromeos.c | |
| parent | 7427abce07fb80289646b7653242022182b9e8f9 (diff) | |
google/edgar: add new board as variant of cyan baseboard
Add support for google/edgar (Acer Chromebook 14 CB3-431) as
a variant of the cyan Braswell basebaseboard.
- Add board-specific code as the new edgar variant
- Add common code to the baseboard which will apply to all
variants other than cyan
Sourced from Chromium branch firmware-edgar-7287.167.B,
commit 2319742: Edgar: Add Micron MT52L256M32D1PF-107 SPD data
Change-Id: I58548cbbc85828f37c0023e8aa9e09bdca612659
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/21127
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/cyan/chromeos.c')
| -rw-r--r-- | src/mainboard/google/cyan/chromeos.c | 23 |
1 files changed, 17 insertions, 6 deletions
diff --git a/src/mainboard/google/cyan/chromeos.c b/src/mainboard/google/cyan/chromeos.c index 8aac84f57f..78856429d2 100644 --- a/src/mainboard/google/cyan/chromeos.c +++ b/src/mainboard/google/cyan/chromeos.c @@ -16,6 +16,7 @@ #include <arch/io.h> #include <rules.h> +#include <gpio.h> #include <soc/gpio.h> #include <string.h> #include <vendorcode/google/chromeos/chromeos.h> @@ -24,6 +25,8 @@ #define WP_STATUS_PAD_CFG0 0x4838 #define WP_STATUS_PAD_CFG1 0x483C +#define WP_GPIO GP_E_22 + #if ENV_RAMSTAGE #include <boot/coreboot_tables.h> @@ -52,15 +55,23 @@ int get_write_protect_state(void) * in the reading. */ #if ENV_ROMSTAGE - write32((void *)(COMMUNITY_GPEAST_BASE + WP_STATUS_PAD_CFG0), - (PAD_PULL_UP_20K | PAD_GPIO_ENABLE | PAD_CONFIG0_GPI_DEFAULT)); - write32((void *)(COMMUNITY_GPEAST_BASE + WP_STATUS_PAD_CFG1), - PAD_CONFIG1_DEFAULT0); + if (IS_ENABLED(CONFIG_BOARD_GOOGLE_CYAN)) { + write32((void *)(COMMUNITY_GPEAST_BASE + WP_STATUS_PAD_CFG0), + (PAD_PULL_UP_20K | PAD_GPIO_ENABLE | PAD_CONFIG0_GPI_DEFAULT)); + write32((void *)(COMMUNITY_GPEAST_BASE + WP_STATUS_PAD_CFG1), + PAD_CONFIG1_DEFAULT0); + } else { + gpio_input_pullup(WP_GPIO); + } #endif /* WP is enabled when the pin is reading high. */ - return (read32((void *)(COMMUNITY_GPEAST_BASE + WP_STATUS_PAD_CFG0)) - & PAD_VAL_HIGH); + if (IS_ENABLED(CONFIG_BOARD_GOOGLE_CYAN)) { + return (read32((void *)(COMMUNITY_GPEAST_BASE + WP_STATUS_PAD_CFG0)) + & PAD_VAL_HIGH); + } else { + return !!gpio_get(WP_GPIO); + } } static const struct cros_gpio cros_gpios[] = { |