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authorMatt DeVillier <matt.devillier@gmail.com>2017-08-20 14:48:57 -0500
committerMartin Roth <martinroth@google.com>2017-09-15 02:36:13 +0000
commite69a9c75816dd3cd6a9af50a09eb090ea00cfed4 (patch)
tree63f4440d3739a1e1efe266572f3c2e8a9e7455b5 /src/mainboard/google/cyan/acpi
parent982688a41ae91218fbb2cfbdb8ff19005ffce0f9 (diff)
google/cyan: convert to variant configuration
Setup cyan to be the baseboard for other Google Braswell boards, to be added in subsequent commits: - Keep code common to all Google Braswell boards in the baseboard, and separate out the board-specific bits into the new cyan variant. - Define the I2C ACPI devices such that they can be easily reused for other variants. - Switch the trackpad/touchscreen interrupts from edge to level, for better performance/compatibility, as was done with all previous Google boards. - Add code to the baseboard to allow optional variant-specific parameters to be used for both memory and silicon init. - Remove superfluous includes, replace some hardcoded values with variables, and correct typos/formatting errors. Change-Id: Iabbbad16efa9cfa79338f4e94d0771779900d8d9 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/21126 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google/cyan/acpi')
-rw-r--r--src/mainboard/google/cyan/acpi/codec_maxim.asl117
-rw-r--r--src/mainboard/google/cyan/acpi/dptf.asl63
-rw-r--r--src/mainboard/google/cyan/acpi/ec.asl2
-rw-r--r--src/mainboard/google/cyan/acpi/mainboard.asl188
-rw-r--r--src/mainboard/google/cyan/acpi/superio.asl2
-rw-r--r--src/mainboard/google/cyan/acpi/touchscreen_elan.asl61
-rw-r--r--src/mainboard/google/cyan/acpi/trackpad_elan.asl53
7 files changed, 241 insertions, 245 deletions
diff --git a/src/mainboard/google/cyan/acpi/codec_maxim.asl b/src/mainboard/google/cyan/acpi/codec_maxim.asl
new file mode 100644
index 0000000000..9abc91e3fa
--- /dev/null
+++ b/src/mainboard/google/cyan/acpi/codec_maxim.asl
@@ -0,0 +1,117 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 Google Inc.
+ * Copyright (C) 2015 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+Scope (\_SB.PCI0.I2C2)
+{
+ /* Maxim Audio Codec */
+ Device (MAXM) /* Audio Codec driver I2C */
+ {
+ Name (_ADR, 0)
+ Name (_HID, AUDIO_CODEC_HID)
+ Name (_CID, AUDIO_CODEC_CID)
+ Name (_DDN, AUDIO_CODEC_DDN)
+ Name (_UID, 1)
+
+ /* Add DT style bindings with _DSD */
+ Name (_DSD, Package () {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ /* set maxim micbias to 2.8v */
+ Package () { "maxim,micbias", 3 },
+ }
+ })
+
+ Method(_CRS, 0x0, NotSerialized)
+ {
+ Name(SBUF,ResourceTemplate ()
+ {
+ I2CSerialBus(
+ AUDIO_CODEC_I2C_ADDR, /* SlaveAddress: bus address */
+ ControllerInitiated, /* SlaveMode: default to ControllerInitiated */
+ 400000, /* ConnectionSpeed: in Hz */
+ AddressingMode7Bit, /* Addressing Mode: default to 7 bit */
+ "\\_SB.PCI0.I2C2", /* ResourceSource: I2C bus controller name */
+ )
+
+ GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullNone,,
+ "\\_SB.GPSE") { BOARD_JACK_MAXIM_GPIO_INDEX }
+ } )
+ Return (SBUF)
+ }
+
+ Method (_STA)
+ {
+ If (LEqual (\S2EN, 1)) {
+ Return (0xF)
+ } Else {
+ Return (0x0)
+ }
+ }
+ }
+ Device (TISW) /* TI Switch driver I2C */
+ {
+ Name (_ADR, 0)
+ Name (_HID, TI_SWITCH_HID)
+ Name (_CID, TI_SWITCH_CID)
+ Name (_DDN, TI_SWITCH_DDN)
+ Name (_UID, 1)
+
+ /* Add DT style bindings with _DSD */
+ Name (_DSD, Package () {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ /* set ti micbias to 2.8v */
+ Package () { "ti,micbias", 7 },
+ }
+ })
+
+ Method(_CRS, 0x0, NotSerialized)
+ {
+ Name(SBUF,ResourceTemplate ()
+ {
+ I2CSerialBus(
+ TI_SWITCH_I2C_ADDR, /* SlaveAddress: bus address */
+ ControllerInitiated, /* SlaveMode: default to ControllerInitiated */
+ 400000, /* ConnectionSpeed: in Hz */
+ AddressingMode7Bit, /* Addressing Mode: default to 7 bit */
+ "\\_SB.PCI0.I2C2", /* ResourceSource: I2C bus controller name */
+ )
+
+ GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullNone,,
+ "\\_SB.GPSW") { BOARD_JACK_TI_GPIO_INDEX }
+
+ } )
+ Return (SBUF)
+ }
+
+ Method (_STA)
+ {
+ Return (0xF)
+ }
+ }
+}
+
+
+Scope (\_SB.PCI0.LPEA)
+{
+ Name (GBUF, ResourceTemplate ()
+ {
+ /* Jack Detect (index 0) */
+ GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullNone,,
+ "\\_SB.GPSE") { BOARD_JACK_MAXIM_GPIO_INDEX }
+ })
+}
diff --git a/src/mainboard/google/cyan/acpi/dptf.asl b/src/mainboard/google/cyan/acpi/dptf.asl
index 95b6951279..d0eaadd94f 100644
--- a/src/mainboard/google/cyan/acpi/dptf.asl
+++ b/src/mainboard/google/cyan/acpi/dptf.asl
@@ -2,7 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2012 Google Inc.
- * Copyright (C) 2105 Intel Corp.
+ * Copyright (C) 2015 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -14,63 +14,8 @@
* GNU General Public License for more details.
*/
-#define DPTF_TSR0_SENSOR_ID 0
-#define DPTF_TSR0_SENSOR_NAME "TMP432_Internal"
-#define DPTF_TSR0_PASSIVE 49
-#define DPTF_TSR0_CRITICAL 75
+/* Include Variant DPTF */
+#include <variant/acpi/dptf.asl>
-#define DPTF_TSR1_SENSOR_ID 1
-#define DPTF_TSR1_SENSOR_NAME "TMP432_Power_top"
-#define DPTF_TSR1_PASSIVE 65
-#define DPTF_TSR1_CRITICAL 85
-
-#define DPTF_TSR2_SENSOR_ID 2
-#define DPTF_TSR2_SENSOR_NAME "TMP432_CPU_bottom"
-#define DPTF_TSR2_PASSIVE 49
-#define DPTF_TSR2_CRITICAL 75
-
-#define DPTF_ENABLE_CHARGER
-
-/* Charger performance states, board-specific values from charger and EC */
-Name (CHPS, Package () {
- Package () { 0, 0, 0, 0, 255, 0x400, "mA", 0 }, /* 1.0A (MAX) */
- Package () { 0, 0, 0, 0, 12, 0x300, "mA", 0 }, /* 0.77A */
- Package () { 0, 0, 0, 0, 8, 0x200, "mA", 0 }, /* 0.5A */
- Package () { 0, 0, 0, 0, 4, 0x100, "mA", 0 }, /* 0.25A */
- Package () { 0, 0, 0, 0, 0, 0x000, "mA", 0 }, /* 0.0A */
-})
-
-/* Mainboard specific _PDL is 1GHz */
-Name (MPDL, 8)
-
-Name (DTRT, Package () {
- /* CPU Throttle Effect on CPU */
- Package () { \_SB.PCI0.B0DB, \_SB.PCI0.B0DB, 100, 50, 0, 0, 0, 0 },
-
- /* CPU Effect on Temp Sensor 0 */
- Package () { \_SB.PCI0.B0DB, \_SB.DPTF.TSR0, 100, 100, 0, 0, 0, 0 },
-})
-
-Name (MPPC, Package ()
-{
- 0x2, /* Revision */
- Package () { /* Power Limit 1 */
- 0, /* PowerLimitIndex, 0 for Power Limit 1 */
- 2000, /* PowerLimitMinimum */
- 6200, /* PowerLimitMaximum */
- 1000, /* TimeWindowMinimum */
- 1000, /* TimeWindowMaximum */
- 200 /* StepSize */
- },
- Package () { /* Power Limit 2 */
- 1, /* PowerLimitIndex, 1 for Power Limit 2 */
- 8000, /* PowerLimitMinimum */
- 8000, /* PowerLimitMaximum */
- 1000, /* TimeWindowMinimum */
- 1000, /* TimeWindowMaximum */
- 1000 /* StepSize */
- }
-})
-
-/* Include DPTF */
+/* Include SoC DPTF */
#include <acpi/dptf/dptf.asl>
diff --git a/src/mainboard/google/cyan/acpi/ec.asl b/src/mainboard/google/cyan/acpi/ec.asl
index ab89841f3d..271fd0a867 100644
--- a/src/mainboard/google/cyan/acpi/ec.asl
+++ b/src/mainboard/google/cyan/acpi/ec.asl
@@ -2,7 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2012 Google Inc.
- * Copyright (C) 2105 Intel Corp.
+ * Copyright (C) 2015 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/src/mainboard/google/cyan/acpi/mainboard.asl b/src/mainboard/google/cyan/acpi/mainboard.asl
index 7a4b0ea355..3228a31bfa 100644
--- a/src/mainboard/google/cyan/acpi/mainboard.asl
+++ b/src/mainboard/google/cyan/acpi/mainboard.asl
@@ -15,7 +15,7 @@
* GNU General Public License for more details.
*/
-#include <onboard.h>
+#include <variant/onboard.h>
Scope (\_SB)
{
@@ -26,189 +26,6 @@ Scope (\_SB)
}
}
-Scope (\_SB.PCI0.I2C1)
-{
- Device (ETSA)
- {
- Name (_HID, "ELAN0001")
- Name (_DDN, "Elan Touchscreen ")
- Name (_UID, 5)
- Name (ISTP, 0) /* TouchScreen */
-
- Method(_CRS, 0x0, NotSerialized)
- {
- Name(BUF0,ResourceTemplate ()
- {
- I2CSerialBus(
- 0x10, /* SlaveAddress */
- ControllerInitiated, /* SlaveMode */
- 400000, /* ConnectionSpeed */
- AddressingMode7Bit, /* AddressingMode */
- "\\_SB.PCI0.I2C1", /* ResourceSource */
- )
- Interrupt (ResourceConsumer, Edge, ActiveLow)
- {
- BOARD_TOUCH_IRQ
- }
-
- } )
- Return (BUF0)
- }
-
- Method (_STA)
- {
- If (LEqual (\S1EN, 1)) {
- Return (0xF)
- } Else {
- Return (0x0)
- }
- }
-
- Name (_PRW, Package() { BOARD_TOUCHSCREEN_WAKE_GPIO, 0x3 })
-
- /* Allow device to power off in S0 */
- Name (_S0W, 4)
- }
-}
-
-Scope (\_SB.PCI0.I2C2)
-{
- /* Maxim Audio Codec */
- Device (MAXM) /* Audio Codec driver I2C */
- {
- Name (_ADR, 0)
- Name (_HID, AUDIO_CODEC_HID)
- Name (_CID, AUDIO_CODEC_CID)
- Name (_DDN, AUDIO_CODEC_DDN)
- Name (_UID, 1)
-
- /* Add DT style bindings with _DSD */
- Name (_DSD, Package () {
- ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
- Package () {
- /* set maxim micbias to 2.8v */
- Package () { "maxim,micbias", 3 },
- }
- })
-
- Method(_CRS, 0x0, NotSerialized)
- {
- Name(SBUF,ResourceTemplate ()
- {
- I2CSerialBus(
- AUDIO_CODEC_I2C_ADDR, /* SlaveAddress: bus address */
- ControllerInitiated, /* SlaveMode: default to ControllerInitiated */
- 400000, /* ConnectionSpeed: in Hz */
- AddressingMode7Bit, /* Addressing Mode: default to 7 bit */
- "\\_SB.PCI0.I2C2", /* ResourceSource: I2C bus controller name */
- )
-
- GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullNone,,
- "\\_SB.GPSE") { BOARD_JACK_MAXIM_GPIO_INDEX }
- } )
- Return (SBUF)
- }
-
- Method (_STA)
- {
- If (LEqual (\S2EN, 1)) {
- Return (0xF)
- } Else {
- Return (0x0)
- }
- }
- }
- Device (TISW) /* TI Switch driver I2C */
- {
- Name (_ADR, 0)
- Name (_HID, TI_SWITCH_HID)
- Name (_CID, TI_SWITCH_CID)
- Name (_DDN, TI_SWITCH_DDN)
- Name (_UID, 1)
-
- /* Add DT style bindings with _DSD */
- Name (_DSD, Package () {
- ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
- Package () {
- /* set ti micbias to 2.8v */
- Package () { "ti,micbias", 7 },
- }
- })
-
- Method(_CRS, 0x0, NotSerialized)
- {
- Name(SBUF,ResourceTemplate ()
- {
- I2CSerialBus(
- TI_SWITCH_I2C_ADDR, /* SlaveAddress: bus address */
- ControllerInitiated, /* SlaveMode: default to ControllerInitiated */
- 400000, /* ConnectionSpeed: in Hz */
- AddressingMode7Bit, /* Addressing Mode: default to 7 bit */
- "\\_SB.PCI0.I2C2", /* ResourceSource: I2C bus controller name */
- )
-
- GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullNone,,
- "\\_SB.GPSW") { BOARD_JACK_TI_GPIO_INDEX }
-
- } )
- Return (SBUF)
- }
-
- Method (_STA)
- {
- Return (0xF)
- }
- }
-}
-
-Scope (\_SB.PCI0.I2C6)
-{
- Device (ETPA)
- {
- Name (_HID, "ELAN0000")
- Name (_DDN, "Elan Touchpad")
- Name (_UID, 3)
- Name (ISTP, 1) /* Touchpad */
-
- Name (_CRS, ResourceTemplate()
- {
- I2cSerialBus (
- 0x15, /* SlaveAddress */
- ControllerInitiated, /* SlaveMode */
- 400000, /* ConnectionSpeed */
- AddressingMode7Bit, /* AddressingMode */
- "\\_SB.PCI0.I2C6", /* ResourceSource */
- )
- GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullNone,,
- "\\_SB.GPNC") { BOARD_TRACKPAD_GPIO_INDEX }
- })
-
- Method (_STA)
- {
- If (LEqual (\S6EN, 1)) {
- Return (0xF)
- } Else {
- Return (0x0)
- }
- }
-
- Name (_PRW, Package() { BOARD_TRACKPAD_WAKE_GPIO, 0x3 })
-
- /* Allow device to power off in S0 */
- Name (_S0W, 4)
- }
-}
-
-Scope (\_SB.PCI0.LPEA)
-{
- Name (GBUF, ResourceTemplate ()
- {
- /* Jack Detect (index 0) */
- GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullNone,,
- "\\_SB.GPSE") { BOARD_JACK_MAXIM_GPIO_INDEX }
- })
-}
-
Scope (\_SB.GPNC)
{
Method (_AEI, 0, NotSerialized) // _AEI: ACPI Event Interrupts
@@ -225,3 +42,6 @@ Scope (\_SB.GPNC)
{
}
}
+
+/* Variant-specific I2C devices */
+#include <variant/acpi/mainboard.asl>
diff --git a/src/mainboard/google/cyan/acpi/superio.asl b/src/mainboard/google/cyan/acpi/superio.asl
index f2a7fc0296..ca973d0fab 100644
--- a/src/mainboard/google/cyan/acpi/superio.asl
+++ b/src/mainboard/google/cyan/acpi/superio.asl
@@ -16,7 +16,7 @@
/* mainboard configuration */
#include <ec.h>
-#include <onboard.h>
+#include <variant/onboard.h>
#define SIO_EC_MEMMAP_ENABLE /* EC Memory Map Resources */
#define SIO_EC_HOST_ENABLE /* EC Host Interface Resources */
diff --git a/src/mainboard/google/cyan/acpi/touchscreen_elan.asl b/src/mainboard/google/cyan/acpi/touchscreen_elan.asl
new file mode 100644
index 0000000000..7100120585
--- /dev/null
+++ b/src/mainboard/google/cyan/acpi/touchscreen_elan.asl
@@ -0,0 +1,61 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 Google Inc.
+ * Copyright (C) 2015 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+Scope (\_SB.PCI0.I2C1)
+{
+ Device (ETSA)
+ {
+ Name (_HID, "ELAN0001")
+ Name (_DDN, "Elan Touchscreen ")
+ Name (_UID, 5)
+ Name (ISTP, 0) /* TouchScreen */
+
+ Method(_CRS, 0x0, NotSerialized)
+ {
+ Name(BUF0,ResourceTemplate ()
+ {
+ I2CSerialBus(
+ 0x10, /* SlaveAddress */
+ ControllerInitiated, /* SlaveMode */
+ 400000, /* ConnectionSpeed */
+ AddressingMode7Bit, /* AddressingMode */
+ "\\_SB.PCI0.I2C1", /* ResourceSource */
+ )
+ Interrupt (ResourceConsumer, Level, ActiveLow)
+ {
+ BOARD_TOUCH_IRQ
+ }
+
+ } )
+ Return (BUF0)
+ }
+
+ Method (_STA)
+ {
+ If (LEqual (\S1EN, 1)) {
+ Return (0xF)
+ } Else {
+ Return (0x0)
+ }
+ }
+
+ Name (_PRW, Package() { BOARD_TOUCHSCREEN_WAKE_GPIO, 0x3 })
+
+ /* Allow device to power off in S0 */
+ Name (_S0W, 4)
+ }
+}
diff --git a/src/mainboard/google/cyan/acpi/trackpad_elan.asl b/src/mainboard/google/cyan/acpi/trackpad_elan.asl
new file mode 100644
index 0000000000..f89e1bc23f
--- /dev/null
+++ b/src/mainboard/google/cyan/acpi/trackpad_elan.asl
@@ -0,0 +1,53 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 Google Inc.
+ * Copyright (C) 2015 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+Scope (\_SB.PCI0.I2C6)
+{
+ Device (ETPA)
+ {
+ Name (_HID, "ELAN0000")
+ Name (_DDN, "Elan Touchpad")
+ Name (_UID, 3)
+ Name (ISTP, 1) /* Touchpad */
+
+ Name (_CRS, ResourceTemplate()
+ {
+ I2cSerialBus (
+ 0x15, /* SlaveAddress */
+ ControllerInitiated, /* SlaveMode */
+ 400000, /* ConnectionSpeed */
+ AddressingMode7Bit, /* AddressingMode */
+ "\\_SB.PCI0.I2C6", /* ResourceSource */
+ )
+ GpioInt (Level, ActiveLow, ExclusiveAndWake, PullNone,,
+ "\\_SB.GPNC") { BOARD_TRACKPAD_GPIO_INDEX }
+ })
+
+ Method (_STA)
+ {
+ If (LEqual (\S6EN, 1)) {
+ Return (0xF)
+ } Else {
+ Return (0x0)
+ }
+ }
+
+ Name (_PRW, Package() { BOARD_TRACKPAD_WAKE_GPIO, 0x3 })
+
+ /* Allow device to power off in S0 */
+ Name (_S0W, 4)
+ }
+}