diff options
| author | Joel Kitching <kitching@google.com> | 2019-04-07 00:37:14 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-04-11 11:23:26 +0000 |
| commit | ae0fb762a2b0592a9734120bd14e0b7a98af9d31 (patch) | |
| tree | 48bff02725b52be3e38e4adb7584ab204c0d7020 /src/mainboard/google/cheza | |
| parent | 482eec0e1bb43aee59cdbb4ec39068fecbcc012b (diff) | |
chromeos: clean up "recovery" and "write protect" GPIOs
The "write protect" GPIO's cached value is never actually
read after entering depthcharge. Ensure the value from
get_write_protect_state() is being transferred accurately,
so that we may read this GPIO value in depthcharge without
resampling.
The cached value of the "recovery" GPIO is read only on certain
boards which have a physical recovery switch. Correct some of
the values sent to boards which presumably never read the
previously incorrect value. Most of these inaccuracies are from
non-inverted values on ACTIVE_LOW GPIOs.
BUG=b:124141368, b:124192753, chromium:950273
TEST=make clean && make test-abuild
BRANCH=none
Change-Id: Ic17a98768703d7098480a9233b752fe5b201bd51
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32233
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/google/cheza')
| -rw-r--r-- | src/mainboard/google/cheza/chromeos.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/cheza/chromeos.c b/src/mainboard/google/cheza/chromeos.c index 1c2c4f5c5f..e84061352e 100644 --- a/src/mainboard/google/cheza/chromeos.c +++ b/src/mainboard/google/cheza/chromeos.c @@ -38,7 +38,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) "EC in RW"}, {GPIO_AP_EC_INT.addr, ACTIVE_LOW, gpio_get(GPIO_AP_EC_INT), "EC interrupt"}, - {GPIO_WP_STATE.addr, ACTIVE_LOW, gpio_get(GPIO_WP_STATE), + {GPIO_WP_STATE.addr, ACTIVE_LOW, !get_write_protect_state(), "write protect"}, {GPIO_H1_AP_INT.addr, ACTIVE_LOW, gpio_get(GPIO_H1_AP_INT), "TPM interrupt"}, |