diff options
| author | Julius Werner <jwerner@chromium.org> | 2018-11-26 17:16:24 -0800 |
|---|---|---|
| committer | Julius Werner <jwerner@chromium.org> | 2018-12-14 21:09:20 +0000 |
| commit | 5d7f5bc973f4aac3e2833baba7e6e386c602f5b4 (patch) | |
| tree | 78d80bb7f9a675d530f2db1db1abf0d099cc4c61 /src/mainboard/google/cheza/Kconfig | |
| parent | 674c62bbee60e05b5830f3b4db85341d130d3d1f (diff) | |
cheza: Add board reset via Chrome EC
This patch implements board reset on the Cheza board. The real board
reset used by the operating system uses the PMIC, but unfortunately the
PMIC needs to be configured right for that to work. The PMIC
configuration currently happens in the Qualcomm blob (QcLib) that is run
from romstage, but vboot needs to be able to reboot during verstage
already. Porting all the PMIC initialization code to run in the
bootblock seems excessive (and at odds with the goal of doing as little
as possible before verification), so we'll just do a little hack and ask
the EC to perform a cold reset instead. For vboot purposes, this should
work just as well.
BUG=b:118501305
TEST=Hacked vboot code to call vboot_reboot(), confirmed that board
reset and came back up as expected.
Change-Id: I3858d95f481884a87c243d4fa3d6369c1e8a5a2c
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/29849
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/cheza/Kconfig')
| -rw-r--r-- | src/mainboard/google/cheza/Kconfig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/google/cheza/Kconfig b/src/mainboard/google/cheza/Kconfig index b940314acb..59f78a8e56 100644 --- a/src/mainboard/google/cheza/Kconfig +++ b/src/mainboard/google/cheza/Kconfig @@ -16,7 +16,6 @@ config BOARD_SPECIFIC_OPTIONS select SPI_FLASH select SPI_FLASH_WINBOND select MAINBOARD_HAS_CHROMEOS - select MISSING_BOARD_RESET select MAINBOARD_HAS_TPM2 select MAINBOARD_HAS_SPI_TPM_CR50 |