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authorRex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>2021-04-19 20:50:44 +0800
committerHung-Te Lin <hungte@chromium.org>2021-05-13 01:43:30 +0000
commit8c3b747ccffc6a0fda8bde74caaf685dde78930f (patch)
tree32afb4dda627758fe63bd1c9acbb0b21ea0d755a /src/mainboard/google/cherry
parent2d0bf34201b68e10597c16d5684c14dd4c9587ea (diff)
soc/mediatek/mt8195: Enable SCP SRAM
Enable SCP SRAM to allow module in SCPSYS to access DRAM. TEST=AFE acess DRAM successfully Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: I40862f8d74e5aa17361f1c91ea31a10b0a4ffb31 Reviewed-on: https://review.coreboot.org/c/coreboot/+/54014 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/cherry')
-rw-r--r--src/mainboard/google/cherry/romstage.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/cherry/romstage.c b/src/mainboard/google/cherry/romstage.c
index cdb2681240..ec7e4f9a0c 100644
--- a/src/mainboard/google/cherry/romstage.c
+++ b/src/mainboard/google/cherry/romstage.c
@@ -6,6 +6,7 @@
#include <soc/mt6359p.h>
#include <soc/pmif.h>
#include <soc/rtc.h>
+#include <soc/scp.h>
void platform_romstage_main(void)
{
@@ -14,4 +15,5 @@ void platform_romstage_main(void)
mt6315_init();
clk_buf_init();
rtc_boot();
+ scp_rsi_enable();
}