diff options
author | Duncan Laurie <dlaurie@chromium.org> | 2015-10-09 09:25:32 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-10-27 15:16:46 +0100 |
commit | 09170f16a4d5ce835d0652db0cc0051eb8b6ac89 (patch) | |
tree | baf94b6c6f415aedb6fef2c2b4ee561f45f1eb55 /src/mainboard/google/chell/dsdt.asl | |
parent | 4a6ac1e0e7fb07338cb25ab081aaace4aca70ad8 (diff) |
google/chell: copy glados to chell
Only change is renaming all occurrences of glados to chell, keeping
capitalization.
Change-Id: I8b1a3efd03d415f27c8872827f8687babbc539f7
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/12150
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google/chell/dsdt.asl')
-rw-r--r-- | src/mainboard/google/chell/dsdt.asl | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/src/mainboard/google/chell/dsdt.asl b/src/mainboard/google/chell/dsdt.asl new file mode 100644 index 0000000000..ba1b2637c1 --- /dev/null +++ b/src/mainboard/google/chell/dsdt.asl @@ -0,0 +1,60 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * Copyright (C) 2015 Google Inc. + * Copyright (C) 2015 Intel Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +DefinitionBlock( + "dsdt.aml", + "DSDT", + 0x05, // DSDT revision: ACPI v5.0 + "COREv4", // OEM id + "COREBOOT", // OEM table id + 0x20110725 // OEM revision +) +{ + // Some generic macros + #include <soc/intel/skylake/acpi/platform.asl> + + // global NVS and variables + #include <soc/intel/skylake/acpi/globalnvs.asl> + + // CPU + #include <soc/intel/skylake/acpi/cpu.asl> + + Scope (\_SB) { + Device (PCI0) + { + #include <soc/intel/skylake/acpi/systemagent.asl> + #include <soc/intel/skylake/acpi/pch.asl> + } + + // Dynamic Platform Thermal Framework + #include "acpi/dptf.asl" + } + + // Chrome OS specific + #include "acpi/chromeos.asl" + #include <vendorcode/google/chromeos/acpi/chromeos.asl> + + // Chipset specific sleep states + #include <soc/intel/skylake/acpi/sleepstates.asl> + + // Mainboard specific + #include "acpi/mainboard.asl" +} |