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authorEric Lai <ericr_lai@compal.corp-partner.google.com>2021-09-30 11:32:38 +0800
committerFelix Held <felix-coreboot@felixheld.de>2021-10-01 14:57:29 +0000
commit0d6ad2638af4aa4b6109d60da2b52fb5b9294c4b (patch)
treedc55bec82fc831db0549b751b9832c482d7e755b /src/mainboard/google/butterfly/dsdt.asl
parent6c2d99f618674f1fc0b416752ada336dafa17a15 (diff)
mb/google/brya/var/felwinter: Correct SSD power sequence
M.2 spec describes PERST# should be sequenced after power enable. Follow up commit 658d7c5 Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I494e0edc135d730cf7bb437f0196cdf233d970d5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58044 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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