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| author | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-02-15 14:09:21 -0600 |
|---|---|---|
| committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-03-15 05:28:29 +0100 |
| commit | 83b05eb0a85d7b7ac0837cece67afabbdb46ea65 (patch) | |
| tree | b303623458247bc4d7ac8572f454290bdd5ba2d9 /src/mainboard/google/butterfly/devicetree.cb | |
| parent | 21d898bad093955d26c928d218a53cc56c18ab57 (diff) | |
google/butterfly: Drop MRC.bin in favor of native raminit
I thought this wasn't going to work, and observing the timC detection
failure of early tests, I was getting somewhat discouraged; however,
this works. I've tried it with all possible permutations of the
following memory modules:
* 2 GiB single-rank DDR3-1600
* 4 GiB single-rank DDR3-1600
* 4 GiB dual-rank DDR3-1600
I did notice a limited number of memtest errors during one of the
runs, but they were in an address range that is otherwise marked as
reserved. I wrote that off as "maybe something was doing MMIO there
just when memtest was poking the address range". I was not able to
reproduce that error.
Change-Id: Ibd52e1d52fc8d900591d6a488f9a5b4d1e5e4fd3
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/8477
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@gmail.com>
Diffstat (limited to 'src/mainboard/google/butterfly/devicetree.cb')
| -rw-r--r-- | src/mainboard/google/butterfly/devicetree.cb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/butterfly/devicetree.cb b/src/mainboard/google/butterfly/devicetree.cb index ed0d8d1887..90925b95f3 100644 --- a/src/mainboard/google/butterfly/devicetree.cb +++ b/src/mainboard/google/butterfly/devicetree.cb @@ -12,6 +12,8 @@ chip northbridge/intel/sandybridge register "gpu_panel_power_backlight_on_delay" = "2100" # T3: 210ms register "gpu_panel_power_backlight_off_delay" = "2100" # T4: 210ms + register "max_mem_clock_mhz" = "666" # DDR3-1333 + device cpu_cluster 0 on chip cpu/intel/socket_rPGA989 device lapic 0 on end |