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author | Michał Kopeć <michal.kopec@3mdeb.com> | 2022-04-07 14:14:31 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-22 17:35:43 +0000 |
commit | febaf2f4131257bc79582784af9ef89b38a37236 (patch) | |
tree | e82ddb89f9e64e0d4196861450bf0d81f7e77c50 /src/mainboard/google/brya | |
parent | 619bb074945bd5acabd0588dcb1371b8c94108d2 (diff) |
soc/intel/alderlake: add GPIO definitions for PCH-S
Add GPIO definitions for ADL-S, similarly to how TGL/TGL-H handles
the split.
Based on:
- Intel PCH-S EDS Vol2 (#621483)
- Alderlake-S FSP
- slimbootloader sources
- Linux alderlake-pinctrl driver
Change-Id: I0fd1dc645c19c33bf14424703f966271e884ed3d
Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63467
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya')
0 files changed, 0 insertions, 0 deletions