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authorDavid Wu <david_wu@quanta.corp-partner.google.com>2022-12-02 14:08:33 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-12-05 14:26:23 +0000
commita874830dcc3a810aec6b3ccffcbb404feb028bf6 (patch)
tree27831554048c3cab5b3fcbea467116bf67be06f9 /src/mainboard/google/brya
parent35693c5028754c80df200123a40cddf568cf0f16 (diff)
mb/google/brya: Set power limit values for kano and zydron
Add the RPL CPU power limits to kano and zydron's power limit table. BUG=b:261127266 BRANCH=brya TEST="emerge-brya coreboot chromeos-bootimage", flash zydron with image-zydron.serial.bin and verify zydron boots successfully to kernel. Change-Id: I369c5d7a9a3db0c3e7184a23b0f159ed715b5a50 Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70238 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/brya')
-rw-r--r--src/mainboard/google/brya/variants/kano/ramstage.c2
-rw-r--r--src/mainboard/google/brya/variants/zydron/ramstage.c2
2 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/kano/ramstage.c b/src/mainboard/google/brya/variants/kano/ramstage.c
index aa48a9db31..c0f126f624 100644
--- a/src/mainboard/google/brya/variants/kano/ramstage.c
+++ b/src/mainboard/google/brya/variants/kano/ramstage.c
@@ -9,6 +9,8 @@ const struct cpu_power_limits limits[] = {
{ PCI_DID_INTEL_ADL_P_ID_6, 15, 12000, 15000, 40000, 40000, 105000 },
{ PCI_DID_INTEL_ADL_P_ID_5, 28, 18000, 20000, 43000, 43000, 105000 },
{ PCI_DID_INTEL_ADL_P_ID_3, 28, 18000, 20000, 43000, 43000, 105000 },
+ { PCI_DID_INTEL_RPL_P_ID_3, 15, 12000, 15000, 40000, 40000, 114000 },
+ { PCI_DID_INTEL_RPL_P_ID_4, 15, 12000, 15000, 40000, 40000, 114000 },
};
void variant_devtree_update(void)
diff --git a/src/mainboard/google/brya/variants/zydron/ramstage.c b/src/mainboard/google/brya/variants/zydron/ramstage.c
index aa48a9db31..c0f126f624 100644
--- a/src/mainboard/google/brya/variants/zydron/ramstage.c
+++ b/src/mainboard/google/brya/variants/zydron/ramstage.c
@@ -9,6 +9,8 @@ const struct cpu_power_limits limits[] = {
{ PCI_DID_INTEL_ADL_P_ID_6, 15, 12000, 15000, 40000, 40000, 105000 },
{ PCI_DID_INTEL_ADL_P_ID_5, 28, 18000, 20000, 43000, 43000, 105000 },
{ PCI_DID_INTEL_ADL_P_ID_3, 28, 18000, 20000, 43000, 43000, 105000 },
+ { PCI_DID_INTEL_RPL_P_ID_3, 15, 12000, 15000, 40000, 40000, 114000 },
+ { PCI_DID_INTEL_RPL_P_ID_4, 15, 12000, 15000, 40000, 40000, 114000 },
};
void variant_devtree_update(void)