mb/google/brya: Enable WFC

1. Add 1 port and 1 endpoint
2. Add support for OVTI8856

WFC is on I2C0
BUG=None

BRANCH=None
TEST=Build and boot brya

Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com>
Signed-off-by: Varshit B Pandya <varshit.b.pandya@intel.com>
Change-Id: Ic5e9c28f255bdf86a68ce80a4f853be4e7c7ccfe
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52013
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

3 files changed, 88 insertions, 4 deletions

diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name
index 70af2d2c5c..2a7a51c1ac 100644
--- a/src/mainboard/google/brya/Kconfig.name
+++ b/src/mainboard/google/brya/Kconfig.name
@@ -5,3 +5,5 @@ config BOARD_GOOGLE_BRYA0
 	select BOARD_ROMSIZE_KB_32768
 	select ADL_ENABLE_USB4_PCIE_RESOURCES
 	select DRIVERS_GENESYSLOGIC_GL9755
+	select DRIVERS_INTEL_MIPI_CAMERA
+	select SOC_INTEL_COMMON_BLOCK_IPU
diff --git a/src/mainboard/google/brya/dsdt.asl b/src/mainboard/google/brya/dsdt.asl
index 2bfb49713e..ac5b82ab8d 100644
--- a/src/mainboard/google/brya/dsdt.asl
+++ b/src/mainboard/google/brya/dsdt.asl
@@ -29,7 +29,6 @@ DefinitionBlock(
 			#include <soc/intel/common/block/acpi/acpi/northbridge.asl>
 			#include <soc/intel/alderlake/acpi/southbridge.asl>
 			#include <soc/intel/alderlake/acpi/tcss.asl>
-			#include <soc/intel/common/block/acpi/acpi/ipu.asl>
 		}
 	}
 
diff --git a/src/mainboard/google/brya/variants/baseboard/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/devicetree.cb
index cabbeea670..ddb1ece729 100644
--- a/src/mainboard/google/brya/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/devicetree.cb
@@ -95,13 +95,12 @@ chip soc/intel/alderlake
 	#+-------------------+---------------------------+
 	#| chipset_lockdown  | CHIPSET_LOCKDOWN_COREBOOT |
 	#| GSPI1             | Fingerprint MCU           |
-	#| I2C0              | Audio                     |
+	#| I2C0              | Audio and WFC             |
 	#| I2C1              | Touchscreen               |
 	#| I2C2              | SAR0                      |
 	#| I2C3              | cr50 TPM. Early init is   |
 	#|                   | required to set up a BAR  |
 	#|                   | for TPM communication     |
-	#| I2C4              | CAM                       |
 	#| I2C5              | Trackpad                  |
 	#+-------------------+---------------------------+
 	register "common_soc_config" = "{
@@ -130,7 +129,19 @@ chip soc/intel/alderlake
 	device domain 0 on
 		device ref igpu on end
 		device ref dtt on end
-		device ref ipu on end
+		device ref ipu on
+			chip drivers/intel/mipi_camera
+				register "acpi_uid" = "0x50000"
+				register "acpi_name" = ""IPU0""
+				register "device_type" = "INTEL_ACPI_CAMERA_CIO2"
+
+				register "cio2_num_ports" = "1"
+				register "cio2_lanes_used" = "{4}" # 4 CSI Camera lanes are used
+				register "cio2_lane_endpoint[0]" = ""^I2C0.CAM0""
+				register "cio2_prt[0]" = "2"
+				device generic 0 on end
+			end
+		end
 		device ref tbt_pcie_rp0 on end
 		device ref tbt_pcie_rp1 on end
 		device ref tbt_pcie_rp2 on end
@@ -145,6 +156,78 @@ chip soc/intel/alderlake
 				device generic 0 on end
 			end
 		end
+
+		device ref i2c0 on
+			chip drivers/intel/mipi_camera
+				register "acpi_hid" = ""OVTI8856""
+				register "acpi_uid" = "0"
+				register "acpi_name" = ""CAM0""
+				register "chip_name" = ""Ov 8856 Camera""
+				register "device_type" = "INTEL_ACPI_CAMERA_SENSOR"
+
+				register "ssdb.lanes_used" = "4"
+				register "ssdb.link_used" = "0"
+				register "ssdb.vcm_type" = "0x0C"
+				register "vcm_name" = ""VCM0""
+				register "num_freq_entries" = "2"
+				register "link_freq[0]" = "360 * MHz" # 360 MHz
+				register "link_freq[1]" = "180 * MHz" # 180 MHz
+				register "remote_name" = ""IPU0""
+
+				register "has_power_resource" = "1"
+				#Controls
+				register "clk_panel.clks[0].clknum" = "IMGCLKOUT_3"
+				register "clk_panel.clks[0].freq" = "FREQ_19_2_MHZ"
+
+				register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" #power_enable_2p8
+				register "gpio_panel.gpio[1].gpio_num" = "GPP_D16" #power_enable_1p2
+				register "gpio_panel.gpio[2].gpio_num" = "GPP_D3" #reset
+
+				#_ON
+				register "on_seq.ops_cnt" = "5"
+				register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
+				register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
+				register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
+				register "on_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(2, 5)"
+				register "on_seq.ops[4]" = "SEQ_OPS_GPIO_ENABLE(2, 5)"
+
+				#_OFF
+				register "off_seq.ops_cnt" = "4"
+				register "off_seq.ops[0]" = "SEQ_OPS_CLK_DISABLE(0, 0)"
+				register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(2, 0)"
+				register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
+				register "off_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
+
+				device i2c 10 on end
+			end
+			chip drivers/intel/mipi_camera
+				register "acpi_uid" = "2"
+				register "acpi_name" = ""VCM0""
+				register "chip_name" = ""DW9768 VCM""
+				register "device_type" = "INTEL_ACPI_CAMERA_VCM"
+
+				register "pr0" = ""\\_SB.PCI0.I2C0.CAM0.PRIC""
+				register "vcm_compat" = ""dongwoon,dw9768""
+
+				device i2c 0C on end
+			end
+			chip drivers/intel/mipi_camera
+				register "acpi_uid" = "1"
+				register "acpi_name" = ""NVM0""
+				register "chip_name" = ""AT24 EEPROM""
+				register "device_type" = "INTEL_ACPI_CAMERA_NVM"
+
+				register "pr0" = ""\\_SB.PCI0.I2C0.CAM0.PRIC""
+				register "nvm_compat" = ""atmel,24c1024""
+
+				register "nvm_size" = "0x2800"
+				register "nvm_pagesize" = "0x01"
+				register "nvm_readonly" = "0x01"
+				register "nvm_width" = "0x0E"
+
+				device i2c 58 on end
+			end
+		end #I2C0
 		device ref i2c3 on
 			chip drivers/i2c/tpm
 				register "hid" = ""GOOG0005""