diff options
author | Wisley Chen <wisley.chen@quanta.corp-partner.google.com> | 2023-07-24 08:26:44 +0600 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2023-07-26 18:14:27 +0000 |
commit | d8f669ef555e60cd0785bd5a56d2fff947cc27d8 (patch) | |
tree | 0245f67872e739045191c37eac9d32dd0637b406 /src/mainboard/google/brya | |
parent | 8845cb01822566afc09b177a09fbc876e251fc83 (diff) |
mb/google/brya/var/anahera: Disable PCH USB2 phy power gating
The patch disables PCH USB2 Phy power gating to fix display flicker
BUG=b:292403156
TEST=Verified on the defeat board
Change-Id: If0c0e655c5d32f39b90635bb3c1d13d8b6993b59
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76669
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/mainboard/google/brya')
-rw-r--r-- | src/mainboard/google/brya/variants/anahera/overridetree.cb | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/anahera/overridetree.cb b/src/mainboard/google/brya/variants/anahera/overridetree.cb index fc79f5e28c..4889696ff9 100644 --- a/src/mainboard/google/brya/variants/anahera/overridetree.cb +++ b/src/mainboard/google/brya/variants/anahera/overridetree.cb @@ -23,6 +23,11 @@ fw_config end chip soc/intel/alderlake register "sagv" = "SaGv_Enabled" + + # As per Intel Advisory doc#723158, the change is required to prevent possible + # display flickering issue. + register "usb2_phy_sus_pg_disable" = "1" + # Acoustic settings register "acoustic_noise_mitigation" = "1" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" |