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authorRaihow Shi <raihow_shi@wistron.corp-partner.google.com>2022-05-19 16:21:15 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-05-24 13:09:31 +0000
commitca29a191d591e1e3e47e1577418916f72e6e108a (patch)
treee0c41bc396aab6e774bf354d970341c7f6e7a281 /src/mainboard/google/brya
parent604060c586e14af73a4f7c9d5cc29583d3857b5c (diff)
mb/google/brask/variants/moli: Remove stop pin declaration for LAN
Remove the stop pin declaration for LAN. Confirmed with LAN vendor, 8111K do not need to implement stop pin. It caused S0ix fail. BUG=b:231400227 TEST=Build and suspend_stress_test -c 5 pass Signed-off-by: Raihow Shi <raihow_shi@wistron.corp-partner.google.com> Change-Id: Iae33068c4622f91d5cebb867e4b10f3834ce8bd8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64494 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya')
-rw-r--r--src/mainboard/google/brya/variants/moli/overridetree.cb4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/google/brya/variants/moli/overridetree.cb b/src/mainboard/google/brya/variants/moli/overridetree.cb
index 4ffa3c702f..db472c557d 100644
--- a/src/mainboard/google/brya/variants/moli/overridetree.cb
+++ b/src/mainboard/google/brya/variants/moli/overridetree.cb
@@ -87,10 +87,6 @@ chip soc/intel/alderlake
chip drivers/net
register "customized_leds" = "0x05af"
register "wake" = "GPE0_DW0_07"
- register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H22)"
- register "stop_delay_ms" = "12" # NIC needs time to quiesce
- register "stop_off_delay_ms" = "1"
- register "has_power_resource" = "1"
register "device_index" = "0"
device pci 00.0 on end
end