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authorZoey Wu <zoey_wu@wistron.corp-partner.google.com>2023-03-03 14:29:23 +0800
committerEric Lai <eric_lai@quanta.corp-partner.google.com>2023-03-16 04:01:59 +0000
commitc9d743ca0490e3849af1e9e825b364180c79c9a5 (patch)
tree27c32eeb0a45f7de8bef86520f214b516f92eb48 /src/mainboard/google/brya
parent7c1c0b33a5b3e18ebb701f4b75174f35a5032704 (diff)
mb/google/brask/var/aurash: Allow USB2/3 wakeups to (un)plug events in dt
BUG=b:271373437 BRANCH=none TEST=Verify USB-A device could wake up Aurash. Signed-off-by: Zoey Wu <zoey_wu@wistron.corp-partner.google.com> Change-Id: I67fc02d6c5660e0e3d1ab95bbda8ace1dc14b524 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73414 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/brya')
-rw-r--r--src/mainboard/google/brya/variants/aurash/overridetree.cb9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/aurash/overridetree.cb b/src/mainboard/google/brya/variants/aurash/overridetree.cb
index 2f773484ab..e40709494f 100644
--- a/src/mainboard/google/brya/variants/aurash/overridetree.cb
+++ b/src/mainboard/google/brya/variants/aurash/overridetree.cb
@@ -36,6 +36,15 @@ chip soc/intel/alderlake
.tx_downscale_amp = 0x00,
}" # Type-A port A2
register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable TCP3
+ # Bitmap for Wake Enable on USB attach/detach
+ register "usb2_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(4) | \
+ USB_PORT_WAKE_ENABLE(6) | \
+ USB_PORT_WAKE_ENABLE(7) | \
+ USB_PORT_WAKE_ENABLE(8)"
+ register "usb3_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \
+ USB_PORT_WAKE_ENABLE(2) | \
+ USB_PORT_WAKE_ENABLE(3) | \
+ USB_PORT_WAKE_ENABLE(4)"
register "tcc_offset" = "0" # TCC of 100C
register "power_limits_config[ADL_P_142_242_282_15W_CORE]" = "{
.tdp_pl1_override = 15,