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authorSubrata Banik <subratabanik@google.com>2022-02-16 17:50:56 +0530
committerFelix Held <felix-coreboot@felixheld.de>2022-02-18 14:55:11 +0000
commitb6d522f6c71f1664efc0cb6fc14af647f7dbaf6e (patch)
treefcc55284ef5c1d762e54be4838a815ded78c0dcd /src/mainboard/google/brya
parentbf265b456baf40cb3e46cdf50bc009fd48215a2d (diff)
mb/google/brya/var/{primus, primus4es}: Use ACPI _PLD macro
This patch uses ACPI _PLD macros for USB Type A and C ports. BUG=b:216490477 TEST=emerge-brya coreboot Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I1a4bc1aae8e815b882a607432e40caf1066453b2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61828 Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/brya')
-rw-r--r--src/mainboard/google/brya/variants/primus/overridetree.cb56
-rw-r--r--src/mainboard/google/brya/variants/primus4es/overridetree.cb56
2 files changed, 16 insertions, 96 deletions
diff --git a/src/mainboard/google/brya/variants/primus/overridetree.cb b/src/mainboard/google/brya/variants/primus/overridetree.cb
index 5fce638568..36fee91a3d 100644
--- a/src/mainboard/google/brya/variants/primus/overridetree.cb
+++ b/src/mainboard/google/brya/variants/primus/overridetree.cb
@@ -319,24 +319,14 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_CENTER,
- .shape = PLD_SHAPE_OVAL,
- .group = ACPI_PLD_GROUP(1, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_OVAL,
- .group = ACPI_PLD_GROUP(2, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, CENTER, ACPI_PLD_GROUP(2, 1))"
device ref tcss_usb3_port3 on end
end
end
@@ -349,24 +339,14 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_CENTER,
- .shape = PLD_SHAPE_OVAL,
- .group = ACPI_PLD_GROUP(1, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_OVAL,
- .group = ACPI_PLD_GROUP(2, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, CENTER, ACPI_PLD_GROUP(2, 1))"
device ref usb2_port3 on end
end
chip drivers/usb/acpi
@@ -383,24 +363,14 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-A Port (MLB)""
register "type" = "UPC_TYPE_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
- .group = ACPI_PLD_GROUP(3, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
device ref usb2_port8 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A0 (DB)""
register "type" = "UPC_TYPE_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_RIGHT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
- .group = ACPI_PLD_GROUP(1, 2)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(1, 2))"
device ref usb2_port9 on end
end
chip drivers/usb/acpi
@@ -414,24 +384,14 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-A Port A0 (DB)""
register "type" = "UPC_TYPE_USB3_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_RIGHT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
- .group = ACPI_PLD_GROUP(1, 2)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(1, 2))"
device ref usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port (MLB)""
register "type" = "UPC_TYPE_USB3_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
- .group = ACPI_PLD_GROUP(3, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
device ref usb3_port2 on end
end
chip drivers/usb/acpi
diff --git a/src/mainboard/google/brya/variants/primus4es/overridetree.cb b/src/mainboard/google/brya/variants/primus4es/overridetree.cb
index e95bde7b02..77218b09d5 100644
--- a/src/mainboard/google/brya/variants/primus4es/overridetree.cb
+++ b/src/mainboard/google/brya/variants/primus4es/overridetree.cb
@@ -313,24 +313,14 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_CENTER,
- .shape = PLD_SHAPE_OVAL,
- .group = ACPI_PLD_GROUP(1, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_OVAL,
- .group = ACPI_PLD_GROUP(2, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, CENTER, ACPI_PLD_GROUP(2, 1))"
device ref tcss_usb3_port3 on end
end
end
@@ -343,24 +333,14 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_CENTER,
- .shape = PLD_SHAPE_OVAL,
- .group = ACPI_PLD_GROUP(1, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_OVAL,
- .group = ACPI_PLD_GROUP(2, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, CENTER, ACPI_PLD_GROUP(2, 1))"
device ref usb2_port3 on end
end
chip drivers/usb/acpi
@@ -377,24 +357,14 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-A Port (MLB)""
register "type" = "UPC_TYPE_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
- .group = ACPI_PLD_GROUP(3, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
device ref usb2_port8 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A0 (DB)""
register "type" = "UPC_TYPE_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_RIGHT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
- .group = ACPI_PLD_GROUP(1, 2)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(1, 2))"
device ref usb2_port9 on end
end
chip drivers/usb/acpi
@@ -408,24 +378,14 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-A Port A0 (DB)""
register "type" = "UPC_TYPE_USB3_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_RIGHT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
- .group = ACPI_PLD_GROUP(1, 2)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(1, 2))"
device ref usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port (MLB)""
register "type" = "UPC_TYPE_USB3_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
- .group = ACPI_PLD_GROUP(3, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
device ref usb3_port2 on end
end
chip drivers/usb/acpi