diff options
author | John Su <john_su@compal.corp-partner.google.com> | 2022-07-07 15:55:57 +0800 |
---|---|---|
committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-07-08 15:30:13 +0000 |
commit | 71139b2048cc9d80e20985111a1e736ee986d50c (patch) | |
tree | 552fd3709b5ada551eb2672002e7329000a345db /src/mainboard/google/brya | |
parent | 8bbc5ba0aef5ba57ca5bac1873619047d8466bf9 (diff) |
mb/google/brya/variants/felwinter: Add fw_config to control TBT PCIe RP0
Use USB4 fw_config to enable TBT PCIe RP0.
BUG=b:237619214, b:237623610
TEST=emerge-brya coreboot chromeos-bootimage
Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Change-Id: Ie3e51a0f30e0c9d20127c017436813d4ede95639
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65696
Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google/brya')
-rw-r--r-- | src/mainboard/google/brya/variants/felwinter/overridetree.cb | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/felwinter/overridetree.cb b/src/mainboard/google/brya/variants/felwinter/overridetree.cb index 06b351800c..31a90656c4 100644 --- a/src/mainboard/google/brya/variants/felwinter/overridetree.cb +++ b/src/mainboard/google/brya/variants/felwinter/overridetree.cb @@ -181,7 +181,9 @@ chip soc/intel/alderlake device generic 0 alias dptf_policy on end end end - device ref tbt_pcie_rp0 on end + device ref tbt_pcie_rp0 on + probe DB_USB USB4_KB8001 + end device ref tbt_pcie_rp1 on probe DB_USB USB4_KB8001 end |