diff options
| author | Frank Chu <Frank_Chu@pegatron.corp-partner.google.com> | 2022-11-18 16:18:43 +0800 |
|---|---|---|
| committer | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2022-11-24 05:28:50 +0000 |
| commit | 77c4d6165dcb0be7164b22ae57861a0d0ce7df4c (patch) | |
| tree | 64579b4c86b83605680584b8428457b0c8beff33 /src/mainboard/google/brya/variants | |
| parent | 461f2a9ba08ce0f3c7ef97f466deaa6ac7c14e25 (diff) | |
mb/google/brya/var/marasov: Update SPD ID assignment
Adjust SPD ID order
DRAM Part Name ID to assign
MT62F512M32D2DR-031 WT:B 0 (0000)
H9JCNNNBK3MLYR-N6E 1 (0001)
MT62F1G32D4DR-031 WT:B 2 (0010)
H9JCNNNCP3MLYR-N6E 3 (0011)
BUG=b:254365935
BRANCH=None
TEST=run part_id_gen to generate SPD id
Signed-off-by: Frank Chu <Frank_Chu@pegatron.corp-partner.google.com>
Change-Id: I3a62cf355508debce387c48d9d089e73763b2bf0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69784
Reviewed-by: Frank Chu <frank_chu@pegatron.corp-partner.google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/brya/variants')
| -rw-r--r-- | src/mainboard/google/brya/variants/marasov/memory/Makefile.inc | 4 | ||||
| -rw-r--r-- | src/mainboard/google/brya/variants/marasov/memory/dram_id.generated.txt | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/brya/variants/marasov/memory/Makefile.inc b/src/mainboard/google/brya/variants/marasov/memory/Makefile.inc index 444b95d245..ecf9d34e52 100644 --- a/src/mainboard/google/brya/variants/marasov/memory/Makefile.inc +++ b/src/mainboard/google/brya/variants/marasov/memory/Makefile.inc @@ -6,5 +6,5 @@ SPD_SOURCES = SPD_SOURCES += spd/lp5/set-0/spd-1.hex # ID = 0(0b0000) Parts = MT62F512M32D2DR-031 WT:B SPD_SOURCES += spd/lp5/set-0/spd-1.hex # ID = 1(0b0001) Parts = H9JCNNNBK3MLYR-N6E -SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 4(0b0100) Parts = MT62F1G32D4DR-031 WT:B -SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 5(0b0101) Parts = H9JCNNNCP3MLYR-N6E +SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 2(0b0010) Parts = MT62F1G32D4DR-031 WT:B +SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 3(0b0011) Parts = H9JCNNNCP3MLYR-N6E diff --git a/src/mainboard/google/brya/variants/marasov/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/marasov/memory/dram_id.generated.txt index f752d5fc8f..82e3b33a4e 100644 --- a/src/mainboard/google/brya/variants/marasov/memory/dram_id.generated.txt +++ b/src/mainboard/google/brya/variants/marasov/memory/dram_id.generated.txt @@ -6,5 +6,5 @@ DRAM Part Name ID to assign MT62F512M32D2DR-031 WT:B 0 (0000) H9JCNNNBK3MLYR-N6E 1 (0001) -MT62F1G32D4DR-031 WT:B 4 (0100) -H9JCNNNCP3MLYR-N6E 5 (0101) +MT62F1G32D4DR-031 WT:B 2 (0010) +H9JCNNNCP3MLYR-N6E 3 (0011) |