diff options
| author | Eric Lai <ericr_lai@compal.corp-partner.google.com> | 2021-05-13 11:55:19 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-05-14 08:56:31 +0000 |
| commit | 08ba703791c3860d25773f88c6c6206c74935d51 (patch) | |
| tree | 7d5cc3c49085d81828cbd6517388ab83153158e5 /src/mainboard/google/brya/variants | |
| parent | 1a9c6270ac7d535f79d2d8ff29113b3a54797972 (diff) | |
mb/google/brya: Use FW_CONFIG LTE_PCIE to turn on/off the PCIE6
PCIE6 only needed when use the PCIE LTE.
BUG=b:180166408
BRANCH=none
TEST=FM350 can/can't be detected when enable/disable this config.
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I9dce05fdb6eb956a054d3815ff706b94f0d3fc37
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54173
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants')
| -rw-r--r-- | src/mainboard/google/brya/variants/brya0/overridetree.cb | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb index ccc0384497..452e1d8789 100644 --- a/src/mainboard/google/brya/variants/brya0/overridetree.cb +++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb @@ -122,6 +122,9 @@ chip soc/intel/alderlake device generic 0 on end end end + device ref pcie_rp6 on + probe DB_LTE LTE_PCIE + end device ref pcie_rp8 on chip soc/intel/common/block/pcie/rtd3 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)" |