summaryrefslogtreecommitdiff
path: root/src/mainboard/google/brya/variants
diff options
context:
space:
mode:
authorWisley Chen <wisley.chen@quanta.corp-partner.google.com>2021-10-28 17:27:39 +0600
committerPatrick Georgi <patrick@coreboot.org>2021-11-23 09:20:53 +0000
commitd88d2da813889b4cdb4bc73492a0ca280667905b (patch)
treefd7ba50c81339af3b92a91b720a4dd4ed4796717 /src/mainboard/google/brya/variants
parent15235b2d89c6b5cb9b26ce5fc892d9ff5ea037c8 (diff)
mb/google/brya/var/redrix: Disable autonomous GPIO power management
With cr50 fw 0.3.22 or older version, it needs to disable autonomous GPIO power management and then can update cr50 fw successfully. BUG=b:202246591 TEST=FW_NAME=redrix emerge-brya coreboot chromeos-bootimage. Change-Id: Idc01ebb4d3ef990f24f18bef5424b7d6ba683d49 Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58694 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants')
-rw-r--r--src/mainboard/google/brya/variants/redrix/overridetree.cb11
1 files changed, 10 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/redrix/overridetree.cb b/src/mainboard/google/brya/variants/redrix/overridetree.cb
index 878fd56d52..67cb7f3b74 100644
--- a/src/mainboard/google/brya/variants/redrix/overridetree.cb
+++ b/src/mainboard/google/brya/variants/redrix/overridetree.cb
@@ -31,8 +31,17 @@ fw_config
end
end
chip soc/intel/alderlake
+ # This disables autonomous GPIO power management, otherwise
+ # old cr50 FW only supports short pulses; need to clarify
+ # the minimum PCH IRQ pulse width with Intel, b/180111628
+ register "gpio_override_pm" = "1"
+ register "gpio_pm[COMM_0]" = "0"
+ register "gpio_pm[COMM_1]" = "0"
+ register "gpio_pm[COMM_2]" = "0"
+ register "gpio_pm[COMM_3]" = "0"
+ register "gpio_pm[COMM_4]" = "0"
+ register "gpio_pm[COMM_5]" = "0"
register "SaGv" = "SaGv_Enabled"
-
register "CnviBtAudioOffload" = "true"
# FIVR RFI Spread Spectrum 6%
register "FivrSpreadSpectrum" = "FIVR_SS_6"