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author | Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com> | 2022-08-05 19:34:57 +0800 |
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committer | Martin L Roth <gaumless@gmail.com> | 2022-08-09 19:23:02 +0000 |
commit | c8ffc827347fedbc05a493403ae59cb9f03f5cb1 (patch) | |
tree | 2be8ff710c61c5f666556d0e309272ec8391d220 /src/mainboard/google/brya/variants | |
parent | 298b00776a139b9cea14319698bacf726b53da61 (diff) |
mb/google/nissa/var/pujjo: Enable USB3.0 port 3 for WWAN
Pujjo support WWAN device, enable USB3.0 port 3 for WWAN device
BUG=b:241322361
TEST=Build and boot on pujjo
Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com>
Change-Id: Iafe2ea18663794138e0a27879fc108d23eb81456
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66457
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants')
-rw-r--r-- | src/mainboard/google/brya/variants/pujjo/overridetree.cb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/pujjo/overridetree.cb b/src/mainboard/google/brya/variants/pujjo/overridetree.cb index 5c4709f2d9..8794d2de06 100644 --- a/src/mainboard/google/brya/variants/pujjo/overridetree.cb +++ b/src/mainboard/google/brya/variants/pujjo/overridetree.cb @@ -16,6 +16,8 @@ chip soc/intel/alderlake register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for PCIe WLAN register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN + register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3 port for WWAN + # Configure external V1P05/Vnn/VnnSx Rails register "ext_fivr_settings" = "{ .configure_ext_fivr = 1, |