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authorSumeet Pawnikar <sumeet.r.pawnikar@intel.com>2021-08-11 20:49:13 +0530
committerTim Wawrzynczak <twawrzynczak@chromium.org>2021-08-15 02:07:35 +0000
commit83c9b3a599ede17e1c656feb8ef240ce0e3ad287 (patch)
treeddba67330505a5fa7ec2e8ba02b57d9f2a0320a0 /src/mainboard/google/brya/variants
parentc18ee230dda5e123575278fbe1fe3ee229d4dd7e (diff)
mb/google/brya: set PL4 value dynamically for thermal
Set PL4 value dynamically for brya board based on CPU SKUs which is detectable at runtime. BUG=b:194745919 BRANCH=None TEST=Build FW and test on brya0 with below messages, On brya (282): Overriding DPTF power limits PL1 (3000, 15000) PL2 (39000, 39000) PL4 (100000) On brya (482): Overriding DPTF power limits PL1 (4000, 28000) PL2 (43000, 43000) PL4 (105000) Change-Id: I20b98ccd8493ed238de647cda8ceb25f62029133 Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56915 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants')
-rw-r--r--src/mainboard/google/brya/variants/baseboard/brya/ramstage.c9
-rw-r--r--src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h1
2 files changed, 8 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/brya/ramstage.c b/src/mainboard/google/brya/variants/baseboard/brya/ramstage.c
index 35cb48835e..6504d5b864 100644
--- a/src/mainboard/google/brya/variants/baseboard/brya/ramstage.c
+++ b/src/mainboard/google/brya/variants/baseboard/brya/ramstage.c
@@ -7,6 +7,7 @@
#include <soc/pci_devs.h>
#include <drivers/intel/dptf/chip.h>
+#include <intelblocks/power_limit.h>
void variant_update_power_limits(const struct cpu_power_limits *limits, size_t num_entries)
{
@@ -30,15 +31,19 @@ void variant_update_power_limits(const struct cpu_power_limits *limits, size_t n
for (size_t i = 0; i < num_entries; i++) {
if (mchid == limits[i].mchid) {
struct dptf_power_limits *settings = &config->controls.power_limits;
+ config_t *conf = config_of_soc();
+ struct soc_power_limits_config *soc_config = conf->power_limits_config;
settings->pl1.min_power = limits[i].pl1_min_power;
settings->pl1.max_power = limits[i].pl1_max_power;
settings->pl2.min_power = limits[i].pl2_min_power;
settings->pl2.max_power = limits[i].pl2_max_power;
- printk(BIOS_INFO, "Overriding DPTF power limits PL1 (%u, %u) PL2 (%u, %u)\n",
+ soc_config->tdp_pl4 = limits[i].pl4_power;
+ printk(BIOS_INFO, "Overriding power limits PL1 (%u, %u) PL2 (%u, %u) PL4 (%u)\n",
limits[i].pl1_min_power,
limits[i].pl1_max_power,
limits[i].pl2_min_power,
- limits[i].pl2_max_power);
+ limits[i].pl2_max_power,
+ limits[i].pl4_power);
}
}
}
diff --git a/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h
index b992129a55..62d8094aae 100644
--- a/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h
@@ -31,6 +31,7 @@ struct cpu_power_limits {
unsigned int pl1_max_power;
unsigned int pl2_min_power;
unsigned int pl2_max_power;
+ unsigned int pl4_power;
};
/* Modify Power Limit devictree settings during ramstage */