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authorV Sowmya <v.sowmya@intel.com>2021-06-21 09:50:47 +0530
committerFelix Held <felix-coreboot@felixheld.de>2021-07-08 15:50:57 +0000
commitd5ab16308667c5772e56f5345ea5fc68f7343a92 (patch)
tree2fca1f709065fdb56fcfd609c2c22ef65d4de448 /src/mainboard/google/brya/spd
parent590eb2bb9c9fac5d3a7d3526601108efe23d801b (diff)
mb/google/brya0: Update the FIVR configurations
This patch sets the disable the external voltage rails since brya board doesn't have V1p05 and Vnn bypass rails implemented. Signed-off-by: V Sowmya <v.sowmya@intel.com> Change-Id: I1c4fdb38c5c56798935b2c6627a75c3f1ac9fbef Reviewed-on: https://review.coreboot.org/c/coreboot/+/55704 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/spd')
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