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authorZhuohao Lee <zhuohao@chromium.org>2021-07-16 20:29:27 +0800
committerPaul Fagerburg <pfagerburg@chromium.org>2021-08-03 15:19:40 +0000
commitc0308eb86068970dec906d01094fce43a4b58c16 (patch)
treefc26eceb3b192bb24eaf72c7224b63297c2e1b74 /src/mainboard/google/brya/Kconfig
parentc7fd6f2f47e7c2fced219e10fc326754b7b2c54b (diff)
mb/google/brya: Introduce new baseboard brask
This patch initiates the brask setting which includes the gpio and device tree setting. BUG=b:191472401 BRANCH=None TEST=build pass Change-Id: I1bb42c7bb2492402de0810bc4ab2e8d8c0e2392b Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56388 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/Kconfig')
-rw-r--r--src/mainboard/google/brya/Kconfig28
1 files changed, 21 insertions, 7 deletions
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index 3637959bf2..9279f4b9be 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -1,17 +1,27 @@
config BOARD_GOOGLE_BASEBOARD_BRYA
def_bool n
+ select ROMSTAGE_SPD_CBFS
+ select SYSTEM_TYPE_LAPTOP
+
+config BOARD_GOOGLE_BASEBOARD_BRASK
+ def_bool n
+
+if BOARD_GOOGLE_BASEBOARD_BRYA || BOARD_GOOGLE_BASEBOARD_BRASK
+
+config BOARD_GOOGLE_BRYA_COMMON
+ def_bool y
select BOARD_ROMSIZE_KB_32768
+ select DRIVERS_GENERIC_MAX98357A
select DRIVERS_I2C_GENERIC
select DRIVERS_I2C_HID
- select DRIVERS_GENERIC_MAX98357A
select DRIVERS_I2C_SX9324
select DRIVERS_INTEL_DPTF
select DRIVERS_INTEL_PMC
select DRIVERS_INTEL_SOUNDWIRE
select DRIVERS_INTEL_USB4_RETIMER
+ select DRIVERS_SPI_ACPI
select DRIVERS_SOUNDWIRE_ALC5682
select DRIVERS_SOUNDWIRE_MAX98373
- select DRIVERS_SPI_ACPI
select DRIVERS_WIFI_GENERIC
select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_ACPI_MEMMAP
@@ -23,7 +33,6 @@ config BOARD_GOOGLE_BASEBOARD_BRYA
select GOOGLE_SMBIOS_MAINBOARD_VERSION
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
- select HAVE_SPD_IN_CBFS
select INTEL_LPSS_UART_FOR_CONSOLE
select MAINBOARD_HAS_CHROMEOS
select MAINBOARD_HAS_I2C_TPM_CR50
@@ -31,13 +40,11 @@ config BOARD_GOOGLE_BASEBOARD_BRYA
select SOC_INTEL_ALDERLAKE
select SOC_INTEL_COMMON_BLOCK_PCIE_RTD3
select SOC_INTEL_CSE_LITE_SKU
- select SYSTEM_TYPE_LAPTOP
-
-if BOARD_GOOGLE_BASEBOARD_BRYA
config BASEBOARD_DIR
string
default "brya" if BOARD_GOOGLE_BASEBOARD_BRYA
+ default "brask" if BOARD_GOOGLE_BASEBOARD_BRASK
config CHROMEOS
select CHROMEOS_DRAM_PART_NUMBER_IN_CBI
@@ -69,9 +76,11 @@ config MAINBOARD_DIR
config MAINBOARD_FAMILY
string
default "Google_Brya" if BOARD_GOOGLE_BASEBOARD_BRYA
+ default "Google_Brask" if BOARD_GOOGLE_BASEBOARD_BRASK
config MAINBOARD_PART_NUMBER
default "Brya" if BOARD_GOOGLE_BRYA0
+ default "Brask" if BOARD_GOOGLE_BRASK
default "Primus" if BOARD_GOOGLE_PRIMUS
default "Gimble" if BOARD_GOOGLE_GIMBLE
default "Redrix" if BOARD_GOOGLE_REDRIX
@@ -81,6 +90,7 @@ config MAINBOARD_PART_NUMBER
config VARIANT_DIR
default "brya0" if BOARD_GOOGLE_BRYA0
+ default "brask" if BOARD_GOOGLE_BRASK
default "primus" if BOARD_GOOGLE_PRIMUS
default "gimble" if BOARD_GOOGLE_GIMBLE
default "redrix" if BOARD_GOOGLE_REDRIX
@@ -96,4 +106,8 @@ config UART_FOR_CONSOLE
int
default 0
-endif # BOARD_GOOGLE_BASEBOARD_BRYA
+config ROMSTAGE_SPD_CBFS
+ def_bool n
+ select HAVE_SPD_IN_CBFS
+
+endif # BOARD_GOOGLE_BASEBOARD_BRYA || BOARD_GOOGLE_BASEBOARD_BRASK