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authorKarthikeyan Ramasubramanian <kramasub@google.com>2024-08-23 11:26:00 -0600
committerKarthik Ramasubramanian <kramasub@google.com>2024-08-28 16:46:04 +0000
commit24066f5edf0c7c513949c82a9cb4250cceb756ae (patch)
tree1f0c98235a2d52a5b84a7548bc8b615c1657d055 /src/mainboard/google/brox
parentb4b7560a9ee7c0c4f82a55ed9c592733c30d3abc (diff)
mb/google/brox: Disable Thunderbolt device
This feature is not required in Brox devices. Hence disable the concerned device. BUG=None TEST=Build Brox firmware and boot to OS. Ensure that the concerned device is disabled in the OS. Change-Id: I355852c780c552e6f9b2c28508f53580f392c1b9 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84093 Reviewed-by: Sowmya Aralguppe <sowmya.aralguppe@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com> Reviewed-by: Abhishek Pandit-Subedi <abhishekpandit@chromium.org>
Diffstat (limited to 'src/mainboard/google/brox')
-rw-r--r--src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb8
-rw-r--r--src/mainboard/google/brox/variants/brox/overridetree.cb14
2 files changed, 4 insertions, 18 deletions
diff --git a/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb b/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb
index a82b4f0994..22e15aca89 100644
--- a/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb
+++ b/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb
@@ -160,11 +160,11 @@ chip soc/intel/alderlake
}"
end
device ref dtt on end
- device ref tbt_pcie_rp0 on end
- device ref tbt_pcie_rp2 on end
+ device ref tbt_pcie_rp0 off end
+ device ref tbt_pcie_rp2 off end
device ref tcss_xhci on end
- device ref tcss_dma0 on end
- device ref tcss_dma1 on end
+ device ref tcss_dma0 off end
+ device ref tcss_dma1 off end
device ref xhci on end
device ref shared_sram on end
device ref i2c0 on
diff --git a/src/mainboard/google/brox/variants/brox/overridetree.cb b/src/mainboard/google/brox/variants/brox/overridetree.cb
index 18baa5d590..37c4e0120b 100644
--- a/src/mainboard/google/brox/variants/brox/overridetree.cb
+++ b/src/mainboard/google/brox/variants/brox/overridetree.cb
@@ -268,20 +268,6 @@ chip soc/intel/alderlake
end
end
end
- device ref tcss_dma0 on
- chip drivers/intel/usb4/retimer
- register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)"
- use tcss_usb3_port1 as dfp[0].typec_port
- device generic 0 on end
- end
- end
- device ref tcss_dma1 on
- chip drivers/intel/usb4/retimer
- register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)"
- use tcss_usb3_port3 as dfp[0].typec_port
- device generic 0 on end
- end
- end
device ref pcie4_0 on
# Enable CPU PCIE RP 1 using CLK 3
register "cpu_pcie_rp[CPU_RP(1)]" = "{