diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2013-06-24 14:57:40 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-12-12 22:12:09 +0100 |
| commit | 3ece50d9db35eecef557fc6ad8cc404224cfc9ac (patch) | |
| tree | 704280460756465755f37a12830167e38865843d /src/mainboard/google/bolt/Makefile.inc | |
| parent | 0a7c49efa02b770f9f4f723633f82784be7ae6b8 (diff) | |
bolt: Initial mainboard commit
BUG=chrome-os-partner:20448
BRANCH=none
TEST=emerge-bolt chromeos-coreboot-bolt
Change-Id: I634a755ac7659e7a977b51bcc061f69eb8263810
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/59843
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4330
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/google/bolt/Makefile.inc')
| -rw-r--r-- | src/mainboard/google/bolt/Makefile.inc | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/src/mainboard/google/bolt/Makefile.inc b/src/mainboard/google/bolt/Makefile.inc new file mode 100644 index 0000000000..57f6f45e04 --- /dev/null +++ b/src/mainboard/google/bolt/Makefile.inc @@ -0,0 +1,46 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2012 Google Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC) += ec.c + +romstage-$(CONFIG_CHROMEOS) += chromeos.c +ramstage-$(CONFIG_CHROMEOS) += chromeos.c + +smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c + +## DIMM SPD for on-board memory +SPD_BIN = $(obj)/spd.bin + +# Order of names in SPD_SOURCES is important! +SPD_SOURCES = micron_4Gb_1600_1.35v_x16 + +SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/$(f).spd.hex) + +# Include spd rom data +$(SPD_BIN): $(SPD_DEPS) + for f in $+; \ + do for c in $$(cat $$f | grep -v ^#); \ + do echo -e -n "\\x$$c"; \ + done; \ + done > $@ + +cbfs-files-y += spd.bin +spd.bin-file := $(SPD_BIN) +spd.bin-type := 0xab +spd.bin-position := 0xfffec000 |