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authorMatt DeVillier <matt.devillier@gmail.com>2016-11-08 15:04:30 -0600
committerMartin Roth <martinroth@google.com>2016-11-24 05:23:36 +0100
commit81ae67a634d3bd72b10f798490ee25c3a3cb807a (patch)
tree3e5ef31344bb3f7bf2492bb4331638c7a6490b9c /src/mainboard/google/beltino/variants/panther/include
parentb952b0d356ea22b5e8dc6a701493ee3523c200a9 (diff)
Add Haswell Chromeboxes/Chromebase using variant board scheme
Combine existing board google/panther with new ChromeOS devices mccloud, monroe, tricky, and zako, using their common reference board (beltino) as a base. Chromium sources used: firmware-mccloud-5827.B 65bfee7 [haswell: No need pre-graphics delay...] firmware-monroe-4921.B 1ac749d [Monroe: Disable KB/MS in ITE8772.] firmware-tricky-5829.B 2db5322 [haswell: No need pre-graphics delay...] firmware-zako-5219.B eacedef [haswell: No need pre-graphics delay...] Existing google/panther board will be removed in a subsequent commit. Variant setup modeled after google/reef Change-Id: I5d7e0c2551e8b0707841032460c35615cefb2886 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/17329 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/beltino/variants/panther/include')
-rw-r--r--src/mainboard/google/beltino/variants/panther/include/variant/gpio.h120
-rw-r--r--src/mainboard/google/beltino/variants/panther/include/variant/thermal.h53
2 files changed, 173 insertions, 0 deletions
diff --git a/src/mainboard/google/beltino/variants/panther/include/variant/gpio.h b/src/mainboard/google/beltino/variants/panther/include/variant/gpio.h
new file mode 100644
index 0000000000..e48f0b4b41
--- /dev/null
+++ b/src/mainboard/google/beltino/variants/panther/include/variant/gpio.h
@@ -0,0 +1,120 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef PANTHER_GPIO_H
+#define PANTHER_GPIO_H
+
+#include <southbridge/intel/lynxpoint/lp_gpio.h>
+
+const struct pch_lp_gpio_map mainboard_gpio_map[] = {
+ LP_GPIO_UNUSED, /* 0: UNUSED */
+ LP_GPIO_UNUSED, /* 1: UNUSED */
+ LP_GPIO_UNUSED, /* 2: UNUSED */
+ LP_GPIO_UNUSED, /* 3: UNUSED */
+ LP_GPIO_NATIVE, /* 4: NATIVE: I2C0_SDA_GPIO4 */
+ LP_GPIO_NATIVE, /* 5: NATIVE: I2C0_SCL_GPIO5 */
+ LP_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */
+ LP_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */
+ LP_GPIO_ACPI_SCI, /* 8: LAN_WAKE_L_Q */
+ LP_GPIO_OUT_HIGH, /* 9: PP3300_WLAN_EN */
+ LP_GPIO_ACPI_SCI, /* 10: WLAN_WAKE_L_Q */
+ LP_GPIO_UNUSED, /* 11: SMBALERT */
+ LP_GPIO_INPUT_INVERT, /* 12: RECOVERY_L */
+ LP_GPIO_UNUSED, /* 13: UNUSED */
+ LP_GPIO_UNUSED, /* 14: UNUSED */
+ LP_GPIO_UNUSED, /* 15: UNUSED (STRAP) */
+ LP_GPIO_UNUSED, /* 16: UNUSED */
+ LP_GPIO_OUT_HIGH, /* 17: PP3300_VP8_EN */
+ LP_GPIO_UNUSED, /* 18: UNUSED */
+ LP_GPIO_UNUSED, /* 19: UNUSED */
+ LP_GPIO_NATIVE, /* 20: NATIVE: CLK_PCIE_REQ2# */
+ LP_GPIO_NATIVE, /* 21: NATIVE: CLK_PCIE_REQ3# */
+ LP_GPIO_NATIVE, /* 22: NATIVE: CLK_PCIE_REQ4# */
+ LP_GPIO_UNUSED, /* 23: UNUSED */
+ LP_GPIO_OUT_HIGH, /* 24: WLAN_OFF_L */
+ LP_GPIO_UNUSED, /* 25: UNUSED */
+ LP_GPIO_OUT_HIGH, /* 26: USB_CTL_1 */
+ LP_GPIO_UNUSED, /* 27: UNUSED */
+ LP_GPIO_OUT_LOW, /* 28: USB_ILIM_SEL */
+ LP_GPIO_UNUSED, /* 29: UNUSED */
+ LP_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSPWRACK_L */
+ LP_GPIO_NATIVE, /* 31: NATIVE: PCH_ACPRESENT */
+ LP_GPIO_NATIVE, /* 32: NATIVE: CLKRUN# */
+ LP_GPIO_NATIVE, /* 33: NATIVE: DEVSLP0 */
+ LP_GPIO_ACPI_SMI, /* 34: EC_SMI_L */
+ LP_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */
+ LP_GPIO_ACPI_SCI, /* 36: EC_SCI_L */
+ LP_GPIO_UNUSED, /* 37: UNUSED */
+ LP_GPIO_UNUSED, /* 38: UNUSED */
+ LP_GPIO_UNUSED, /* 39: UNUSED */
+ LP_GPIO_NATIVE, /* 40: NATIVE: USB_OC0# */
+ LP_GPIO_NATIVE, /* 41: NATIVE: USB_OC1# */
+ LP_GPIO_NATIVE, /* 42: NATIVE: USB_OC2# */
+ LP_GPIO_NATIVE, /* 43: NATIVE: USB_OC3# */
+ LP_GPIO_UNUSED, /* 44: UNUSED */
+ LP_GPIO_OUT_HIGH, /* 45: PP5000_CODEC_EN */
+ LP_GPIO_OUT_HIGH, /* 46: BT_DISABLE_L */
+ LP_GPIO_OUT_HIGH, /* 47: USB1_PWR_EN */
+ LP_GPIO_UNUSED, /* 48: UNUSED */
+ LP_GPIO_UNUSED, /* 49: UNUSED */
+ LP_GPIO_OUT_HIGH, /* 50: VP8_DISABLE_L */
+ LP_GPIO_UNUSED, /* 51: UNUSED */
+ LP_GPIO_UNUSED, /* 52: UNUSED */
+ LP_GPIO_UNUSED, /* 53: UNUSED */
+ LP_GPIO_UNUSED, /* 54: UNUSED */
+ LP_GPIO_UNUSED, /* 55: UNUSED */
+ LP_GPIO_OUT_HIGH, /* 56: USB2_PWR_EN */
+ LP_GPIO_OUT_HIGH, /* 57: USB3_PWR_EN */
+ LP_GPIO_INPUT, /* 58: PCH_SPI_WP_D */
+ LP_GPIO_OUT_HIGH, /* 59: PP3300_LAN_EN */
+ LP_GPIO_NATIVE, /* 60: NATIVE: SMB0ALERT# */
+ LP_GPIO_UNUSED, /* 61: UNUSED */
+ LP_GPIO_UNUSED, /* 62: UNUSED */
+ LP_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */
+ LP_GPIO_UNUSED, /* 64: UNUSED */
+ LP_GPIO_UNUSED, /* 65: UNUSED */
+ LP_GPIO_UNUSED, /* 66: UNUSED (STRAP) */
+ LP_GPIO_UNUSED, /* 67: UNUSED */
+ LP_GPIO_UNUSED, /* 68: UNUSED */
+ LP_GPIO_UNUSED, /* 69: UNUSED */
+ LP_GPIO_UNUSED, /* 70: UNUSED */
+ LP_GPIO_NATIVE, /* 71: NATIVE: MODPHY_EN */
+ LP_GPIO_UNUSED, /* 72: UNUSED */
+ LP_GPIO_UNUSED, /* 73: UNUSED */
+ LP_GPIO_NATIVE, /* 74: NATIVE: SMB_ME1_DAT */
+ LP_GPIO_NATIVE, /* 75: NATIVE: SMB_ME1_CLK */
+ LP_GPIO_UNUSED, /* 76: UNUSED */
+ LP_GPIO_UNUSED, /* 77: UNUSED */
+ LP_GPIO_UNUSED, /* 78: UNUSED */
+ LP_GPIO_UNUSED, /* 79: UNUSED */
+ LP_GPIO_UNUSED, /* 80: UNUSED */
+ LP_GPIO_NATIVE, /* 81: NATIVE: SPKR */
+ LP_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */
+ LP_GPIO_UNUSED, /* 83: UNUSED */
+ LP_GPIO_UNUSED, /* 84: UNUSED */
+ LP_GPIO_UNUSED, /* 85: UNUSED */
+ LP_GPIO_UNUSED, /* 86: UNUSED (STRAP) */
+ LP_GPIO_UNUSED, /* 87: UNUSED */
+ LP_GPIO_UNUSED, /* 88: UNUSED */
+ LP_GPIO_UNUSED, /* 89: UNUSED */
+ LP_GPIO_UNUSED, /* 90: UNUSED */
+ LP_GPIO_UNUSED, /* 91: UNUSED */
+ LP_GPIO_UNUSED, /* 92: UNUSED */
+ LP_GPIO_UNUSED, /* 93: UNUSED */
+ LP_GPIO_UNUSED, /* 94: UNUSED */
+ LP_GPIO_END
+};
+
+#endif
diff --git a/src/mainboard/google/beltino/variants/panther/include/variant/thermal.h b/src/mainboard/google/beltino/variants/panther/include/variant/thermal.h
new file mode 100644
index 0000000000..9dd3551440
--- /dev/null
+++ b/src/mainboard/google/beltino/variants/panther/include/variant/thermal.h
@@ -0,0 +1,53 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef THERMAL_H
+#define THERMAL_H
+
+/* Fan is OFF */
+#define FAN4_THRESHOLD_OFF 0
+#define FAN4_THRESHOLD_ON 0
+#define FAN4_PWM 0x00
+
+/* Fan is at LOW speed */
+#define FAN3_THRESHOLD_OFF 40
+#define FAN3_THRESHOLD_ON 50
+#define FAN3_PWM 0x6b
+
+/* Fan is at MEDIUM speed */
+#define FAN2_THRESHOLD_OFF 75
+#define FAN2_THRESHOLD_ON 83
+#define FAN2_PWM 0xcc
+
+/* Fan is at HIGH speed */
+#define FAN1_THRESHOLD_OFF 86
+#define FAN1_THRESHOLD_ON 90
+#define FAN1_PWM 0xe5
+
+/* Fan is at FULL speed */
+#define FAN0_THRESHOLD_OFF 93
+#define FAN0_THRESHOLD_ON 96
+#define FAN0_PWM 0xff
+
+/* Temperature which OS will shutdown at */
+#define CRITICAL_TEMPERATURE 100
+
+/* Temperature which OS will throttle CPU */
+#define PASSIVE_TEMPERATURE 90
+
+/* Tj_max value for calculating PECI CPU temperature */
+#define MAX_TEMPERATURE 100
+
+#endif