diff options
author | Rocky Phagura <rphagura@fb.com> | 2021-04-03 08:49:32 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2021-06-04 12:38:32 +0000 |
commit | d4db36e672644ac7f528d12c5ce3539725456085 (patch) | |
tree | 54887ccb33b3d62df2a684613006da4275c46d16 /src/mainboard/google/beltino/data.vbt | |
parent | 3bfa1bde60dc3197c27f60ed7b25f9cbdbd3c4bb (diff) |
src/intel/xeon_sp: add hardware error support (HEST)
This patch adds the ACPI hardware error source table (HEST) support.
This involves a few different parts: (1) The ACPI HEST table which is filled
with the appropriate fields (2) Reserved memory which is used by runtime
SW to provide error information. OS will not accept a HEST table with
this memory set to 0.
The ASL code to enable APEI bit will be submitted in a separate patch.
Tested on DeltaLake mainboard with following options enabled
SOC_INTEL_XEON_RAS
After boot to Linux, the following will show in dmesg:
HEST: Table parsing has been initialized
Change-Id: If76b2af153616182cc053ca878f30fe056e9c8bd
Signed-off-by: Rocky Phagura <rphagura@fb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52090
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/google/beltino/data.vbt')
0 files changed, 0 insertions, 0 deletions