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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-06-21 15:04:51 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-04 21:23:21 +0000 |
commit | de7f0736a16edb8d34df6e057b87a0bc1fbf7874 (patch) | |
tree | 9a412a0102208af69739300b58fbb5c85d46439a /src/mainboard/google/beltino/chromeos.c | |
parent | 1de326460eb240ba9780d8e1a2a2dc73d0f9f347 (diff) |
mb/*/chromeos.c: Fix PRE_RAM and unify style
Change-Id: I99b9c0452ed0e6d580edb5a4f3317d776085b382
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30399
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/beltino/chromeos.c')
-rw-r--r-- | src/mainboard/google/beltino/chromeos.c | 25 |
1 files changed, 12 insertions, 13 deletions
diff --git a/src/mainboard/google/beltino/chromeos.c b/src/mainboard/google/beltino/chromeos.c index ad4eab98b1..0be19fa7b9 100644 --- a/src/mainboard/google/beltino/chromeos.c +++ b/src/mainboard/google/beltino/chromeos.c @@ -48,32 +48,32 @@ void fill_lb_gpios(struct lb_gpios *gpios) int get_write_protect_state(void) { -#ifdef __PRE_RAM__ - pci_devfn_t dev; - dev = PCI_DEV(0, 0x1f, 2); +#ifdef __SIMPLE_DEVICE__ + pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); #else - struct device *dev; - dev = dev_find_slot(0, PCI_DEVFN(0x1f, 2)); + struct device *dev = pcidev_on_root(0x1f, 2); #endif return (pci_read_config32(dev, SATA_SP) >> FLAG_SPI_WP) & 1; } int get_recovery_mode_switch(void) { -#ifdef __PRE_RAM__ - pci_devfn_t dev; - dev = PCI_DEV(0, 0x1f, 2); +#ifdef __SIMPLE_DEVICE__ + pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); #else - struct device *dev; - dev = dev_find_slot(0, PCI_DEVFN(0x1f, 2)); + struct device *dev = pcidev_on_root(0x1f, 2); #endif return (pci_read_config32(dev, SATA_SP) >> FLAG_REC_MODE) & 1; } -#ifdef __PRE_RAM__ void init_bootmode_straps(void) { u32 flags = 0; +#ifdef __SIMPLE_DEVICE__ + pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); +#else + struct device *dev = pcidev_on_root(0x1f, 2); +#endif /* Write Protect: GPIO58 = GPIO_SPI_WP, active high */ if (get_gpio(GPIO_SPI_WP)) @@ -85,9 +85,8 @@ void init_bootmode_straps(void) /* Developer: Virtual */ - pci_write_config32(PCI_DEV(0, 0x1f, 2), SATA_SP, flags); + pci_write_config32(dev, SATA_SP, flags); } -#endif static const struct cros_gpio cros_gpios[] = { CROS_GPIO_REC_AL(GPIO_REC_MODE, CROS_GPIO_DEVICE_NAME), |