Add Haswell Chromeboxes/Chromebase using variant board scheme

Combine existing board google/panther with new ChromeOS devices
mccloud, monroe, tricky, and zako, using their common reference board
(beltino) as a base.

Chromium sources used:
firmware-mccloud-5827.B 65bfee7 [haswell: No need pre-graphics delay...]
firmware-monroe-4921.B 1ac749d [Monroe: Disable KB/MS in ITE8772.]
firmware-tricky-5829.B 2db5322 [haswell: No need pre-graphics delay...]
firmware-zako-5219.B eacedef [haswell: No need pre-graphics delay...]

Existing google/panther board will be removed in a subsequent commit.

Variant setup modeled after google/reef

Change-Id: I5d7e0c2551e8b0707841032460c35615cefb2886
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/17329
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

1 files changed, 71 insertions, 0 deletions

diff --git a/src/mainboard/google/beltino/acpi/platform.asl b/src/mainboard/google/beltino/acpi/platform.asl
new file mode 100644
index 0000000000..bc2fba2ff1
--- /dev/null
+++ b/src/mainboard/google/beltino/acpi/platform.asl
@@ -0,0 +1,71 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ * Copyright (C) 2012 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/* The APM port can be used for generating software SMIs */
+
+OperationRegion (APMP, SystemIO, 0xb2, 2)
+Field (APMP, ByteAcc, NoLock, Preserve)
+{
+	APMC, 8,	// APM command
+	APMS, 8		// APM status
+}
+
+/* Port 80 POST */
+
+OperationRegion (POST, SystemIO, 0x80, 1)
+Field (POST, ByteAcc, Lock, Preserve)
+{
+	DBG0, 8
+}
+
+/* SMI I/O Trap */
+Method(TRAP, 1, Serialized)
+{
+	Store (Arg0, SMIF)	// SMI Function
+	Store (0, TRP0)		// Generate trap
+	Return (SMIF)		// Return value of SMI handler
+}
+
+/* The _PIC method is called by the OS to choose between interrupt
+ * routing via the i8259 interrupt controller or the APIC.
+ *
+ * _PIC is called with a parameter of 0 for i8259 configuration and
+ * with a parameter of 1 for Local Apic/IOAPIC configuration.
+ */
+
+Method(_PIC, 1)
+{
+	// Remember the OS' IRQ routing choice.
+	Store(Arg0, PICM)
+}
+
+/* The _PTS method (Prepare To Sleep) is called before the OS is
+ * entering a sleep state. The sleep state number is passed in Arg0
+ */
+
+Method(_PTS,1)
+{
+}
+
+/* The _WAK method is called on system wakeup */
+
+Method(_WAK,1)
+{
+	/* Initialize thermal defaults */
+	\_TZ.THRM._INI ()
+
+	Return(Package(){0,0})
+}