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authorMatt DeVillier <matt.devillier@gmail.com>2016-11-08 15:04:30 -0600
committerMartin Roth <martinroth@google.com>2016-11-24 05:23:36 +0100
commit81ae67a634d3bd72b10f798490ee25c3a3cb807a (patch)
tree3e5ef31344bb3f7bf2492bb4331638c7a6490b9c /src/mainboard/google/beltino/acpi/mainboard.asl
parentb952b0d356ea22b5e8dc6a701493ee3523c200a9 (diff)
Add Haswell Chromeboxes/Chromebase using variant board scheme
Combine existing board google/panther with new ChromeOS devices mccloud, monroe, tricky, and zako, using their common reference board (beltino) as a base. Chromium sources used: firmware-mccloud-5827.B 65bfee7 [haswell: No need pre-graphics delay...] firmware-monroe-4921.B 1ac749d [Monroe: Disable KB/MS in ITE8772.] firmware-tricky-5829.B 2db5322 [haswell: No need pre-graphics delay...] firmware-zako-5219.B eacedef [haswell: No need pre-graphics delay...] Existing google/panther board will be removed in a subsequent commit. Variant setup modeled after google/reef Change-Id: I5d7e0c2551e8b0707841032460c35615cefb2886 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/17329 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/beltino/acpi/mainboard.asl')
-rw-r--r--src/mainboard/google/beltino/acpi/mainboard.asl69
1 files changed, 69 insertions, 0 deletions
diff --git a/src/mainboard/google/beltino/acpi/mainboard.asl b/src/mainboard/google/beltino/acpi/mainboard.asl
new file mode 100644
index 0000000000..03dc5e0214
--- /dev/null
+++ b/src/mainboard/google/beltino/acpi/mainboard.asl
@@ -0,0 +1,69 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <onboard.h>
+
+Scope (\_SB)
+{
+ Device (PWRB)
+ {
+ Name(_HID, EisaId("PNP0C0C"))
+ }
+}
+
+/*
+ * LAN connected to Root Port 3, becomes Root Port 1 after coalesce
+ */
+Scope (\_SB.PCI0.RP01)
+{
+ Device (ETH0)
+ {
+ Name (_ADR, 0x00000000)
+ Name (_PRW, Package() { NIC_WAKE_GPIO, 3 })
+
+ Method (_DSW, 3, NotSerialized)
+ {
+ Store (NIC_WAKE_GPIO, Local0)
+
+ If (LEqual (Arg0, 1)) {
+ // Enable GPIO as wake source
+ \_SB.PCI0.LPCB.GWAK (Local0)
+ }
+ }
+ }
+}
+
+/*
+ * WLAN connected to Root Port 4, becomes Root Port 2 after coalesce
+ */
+Scope (\_SB.PCI0.RP02)
+{
+ Device (WLAN)
+ {
+ Name (_ADR, 0x00000000)
+ Name (_PRW, Package() { WLAN_WAKE_GPIO, 3 })
+
+ Method (_DSW, 3, NotSerialized)
+ {
+ Store (WLAN_WAKE_GPIO, Local0)
+
+ If (LEqual (Arg0, 1)) {
+ // Enable GPIO as wake source
+ \_SB.PCI0.LPCB.GWAK (Local0)
+ }
+ }
+ }
+}