diff options
| author | Matt DeVillier <matt.devillier@gmail.com> | 2016-12-18 11:59:58 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-12-22 18:37:56 +0100 |
| commit | 45e11aa0a573aba1e4d8ae8dcd2cc87a8ca87dab (patch) | |
| tree | 12f08b3aa147f80357afdd9ad437d8ac005caf05 /src/mainboard/google/auron/smihandler.c | |
| parent | 0148fcb4e1d1c4e43cd21e7b28a65afd762daa6d (diff) | |
Add/Combine Broadwell Chromebooks using variant board scheme
Combine existing boards google/auron_paine and google/samus with new
ChromeOS devices auron_yuna, gandof and lulu, using their common
reference board (auron) as a base.
Chromium sources used:
firmware-yuna-6301.59.B 6ed8b9d [CHERRY-PICK: broadwell: Update to...]
firmware-gandof-6301.155.B 666f34f [gandof: modify power limiting for...]
firmware-lulu-6301.136.B 8811714 [lulu: update RAMID table]
Additionally, some minor cleanup/changes were made:
- I2C devices set to use level (vs edge) interrupt triggering
- HDA verb entries use simplified macro entry format
- correct FADT table header version
- remove unused ACPI device entries / .asl file(s)
- clean up ACPI code (e.g., trackpad on Lulu)
- adjust _CID for trackpad on Lulu in order to not load non-functional
Windows driver (does not affect Linux)
- remove unused header includes (multiple/various)
- correct I2C addresses used for SMBIOS device entries
- correct misc typos etc
The existing auron_paine samus boards are removed.
Variant setup modeled after google/slippy
Change-Id: I53436878d141715eb18b8ea5043d71e6e8728fe8
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/17917
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/auron/smihandler.c')
| -rw-r--r-- | src/mainboard/google/auron/smihandler.c | 29 |
1 files changed, 17 insertions, 12 deletions
diff --git a/src/mainboard/google/auron/smihandler.c b/src/mainboard/google/auron/smihandler.c index c962bb93eb..03d07b9113 100644 --- a/src/mainboard/google/auron/smihandler.c +++ b/src/mainboard/google/auron/smihandler.c @@ -25,15 +25,8 @@ #include <soc/gpio.h> #include <soc/iomap.h> #include <soc/nvs.h> -#include <soc/pm.h> -#include <soc/smm.h> #include "ec.h" - -/* Codec enable: GPIO45 */ -#define GPIO_PP3300_CODEC_EN 45 -/* WLAN / BT enable: GPIO46 */ -#define GPIO_WLAN_DISABLE_L 46 - +#include <variant/onboard.h> static u8 mainboard_smi_ec(void) { @@ -70,6 +63,20 @@ void mainboard_smi_gpi(u32 gpi_sts) } } +static void mainboard_disable_gpios(void) +{ +#if IS_ENABLED(CONFIG_BOARD_GOOGLE_SAMUS) + /* Put SSD in reset to prevent leak */ + set_gpio(BOARD_SSD_RESET_GPIO, 0); + /* Disable LTE */ + set_gpio(BOARD_LTE_DISABLE_GPIO, 0); +#else + set_gpio(BOARD_PP3300_CODEC_GPIO, 0); +#endif + /* Prevent leak from standby rail to WLAN rail */ + set_gpio(BOARD_WLAN_DISABLE_GPIO, 0); +} + void mainboard_smi_sleep(u8 slp_typ) { /* Disable USB charging if required */ @@ -82,8 +89,7 @@ void mainboard_smi_sleep(u8 slp_typ) 1, USB_CHARGE_MODE_DISABLED); } - set_gpio(GPIO_PP3300_CODEC_EN, 0); - set_gpio(GPIO_WLAN_DISABLE_L, 0); + mainboard_disable_gpios(); /* Enable wake events */ google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS); @@ -96,8 +102,7 @@ void mainboard_smi_sleep(u8 slp_typ) 1, USB_CHARGE_MODE_DISABLED); } - set_gpio(GPIO_PP3300_CODEC_EN, 0); - set_gpio(GPIO_WLAN_DISABLE_L, 0); + mainboard_disable_gpios(); /* Enable wake events */ google_chromeec_set_wake_mask(MAINBOARD_EC_S5_WAKE_EVENTS); |