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authorMaulik V Vaghela <maulik.v.vaghela@intel.com>2018-12-28 13:44:59 +0530
committerPatrick Georgi <pgeorgi@google.com>2019-01-24 13:52:15 +0000
commit6225a677406a81990498aaf48a486a5bcad0d1fd (patch)
tree86515155b31cc563819c849e860b8b9588a56bc5 /src/mainboard/google/auron/acpi
parent3748aae7d6118fed531fe94b94977760b164821b (diff)
mb/google/hatch: Enable PCIe WLAN and BT
Enable PCIe WLAN for hatch 1. Enable PCI port 14 for PCIe WLAN 2. Enable CLKREQ, CLK SRC 3 for PCI port 14 3. GPIO pad config for WLAN and BT USB port for BT has already been enabled so not included in this patch BUG=b:120914069 BRANCH=none TEST=check if code compiles correctly and verify GPIO configuration with schematics Change-Id: I4f2a6eb37a467ad8b8cdde8fe6b657fabb383b04 Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/c/30467 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Diffstat (limited to 'src/mainboard/google/auron/acpi')
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