summaryrefslogtreecommitdiff
path: root/src/mainboard/google/auron/Kconfig
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2020-10-29 11:02:21 +0100
committerAngel Pons <th3fanbus@gmail.com>2021-01-24 12:03:08 +0000
commit739a6ad1ac098231c34587c69237906e721b7e91 (patch)
treea8b30f1aa418b9bf8c6883e239f7aac718909816 /src/mainboard/google/auron/Kconfig
parentd0b7a534ce798eff46a2de4857f48e65100c1572 (diff)
mb/google/auron: Use Haswell CPU code
The VR config and S0ix options are now specified for the CPU chip. Change-Id: I75e405d41b4a0605e786fe761c92535e62d0cfce Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46945 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/auron/Kconfig')
-rw-r--r--src/mainboard/google/auron/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/auron/Kconfig b/src/mainboard/google/auron/Kconfig
index 5301e32571..293a973071 100644
--- a/src/mainboard/google/auron/Kconfig
+++ b/src/mainboard/google/auron/Kconfig
@@ -1,6 +1,7 @@
config BOARD_GOOGLE_BASEBOARD_AURON
def_bool n
+ select CPU_INTEL_HASWELL
select SOC_INTEL_BROADWELL
select BOARD_ROMSIZE_KB_8192
select EC_GOOGLE_CHROMEEC