diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-06-23 16:51:16 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2022-08-14 10:53:47 +0000 |
| commit | 865c97c304af61903f3fad7d489db5097255fe11 (patch) | |
| tree | 6553ab5a609e46ab583253af86abd0ad13e33568 /src/mainboard/google/auron/Kconfig | |
| parent | 4a8cb30222a34de760d38c7d13d54e24221d9fec (diff) | |
broadwell: Decouple LPDDR3 DQ/DQS maps from `pei_data`
Introduce the `BROADWELL_LPDDR3` Kconfig option along with some wrapper
code to allow mainboards using LPDDR3 DRAM to supply the DQ/DQS maps to
chipset code without having to use `pei_data`. The only mainboard using
LPDDR3 is Google Samus.
Change-Id: I0aaf0ace243c03600430c2a7ab6389a7b20cb432
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55812
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/auron/Kconfig')
| -rw-r--r-- | src/mainboard/google/auron/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/auron/Kconfig b/src/mainboard/google/auron/Kconfig index 3551be1f87..c12d982166 100644 --- a/src/mainboard/google/auron/Kconfig +++ b/src/mainboard/google/auron/Kconfig @@ -1,6 +1,7 @@ config BOARD_GOOGLE_BASEBOARD_AURON def_bool n select BOARD_ROMSIZE_KB_8192 + select BROADWELL_LPDDR3 if BOARD_GOOGLE_SAMUS select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_LPC select HAVE_ACPI_RESUME |