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authorHung-Te Lin <hungte@chromium.org>2020-08-12 20:55:41 +0800
committerHung-Te Lin <hungte@chromium.org>2020-10-26 03:04:08 +0000
commit6871d51125dcf7c091c9c461c3e9b8bfa681217d (patch)
treec8081b9f1b92000b89d54bf42df77a579a47c88d /src/mainboard/google/asurada
parentd3d50e027f8c5b4b2a19450fa89ed0e07d69ce8e (diff)
mb/google/asurada: fix EC commands timeout
The Asurada EC is using the large packet (256B) mode, and we were seeing lots of timeout errors on various commands. The AcceptTimeoutUs in EC SPI driver is hard-coded at 5000, and that is too small for large packet running in 1M so we should change EC SPI to the same value that kernel is using (3M). BUG=b:161509047 TEST=emerge-asurada coreboot chromeos-bootimage; flash and boot Signed-off-by: Hung-Te Lin <hungte@chromium.org> Change-Id: I9c47324022129ca23ef75d0c80e215da1692636d Reviewed-on: https://review.coreboot.org/c/coreboot/+/46394 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/asurada')
-rw-r--r--src/mainboard/google/asurada/bootblock.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/asurada/bootblock.c b/src/mainboard/google/asurada/bootblock.c
index 04e8898d85..647555a339 100644
--- a/src/mainboard/google/asurada/bootblock.c
+++ b/src/mainboard/google/asurada/bootblock.c
@@ -7,7 +7,7 @@
void bootblock_mainboard_init(void)
{
- mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 1 * MHz, 0);
+ mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 3 * MHz, 0);
mtk_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, SPI_PAD0_MASK, 1 * MHz, 0);
setup_chromeos_gpios();
gpio_eint_configure(GPIO_H1_AP_INT, IRQ_TYPE_EDGE_RISING);