diff options
author | Huayang Duan <huayang.duan@mediatek.com> | 2020-07-03 10:18:58 +0800 |
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committer | Hung-Te Lin <hungte@chromium.org> | 2020-10-20 06:59:34 +0000 |
commit | 075ad63a4fd344ed213f24aad0d810a9bd1f48e3 (patch) | |
tree | 080e034eaf88b2176959db7252e032d718b8f87a /src/mainboard/google/asurada/romstage.c | |
parent | c90a9e68b77caf5c909b4b10120374d50dd7ce66 (diff) |
mb/google/asurada: Init dram in romstage
Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Change-Id: Ied350570a695cca1424a6562e41120bcaf467797
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44568
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/asurada/romstage.c')
-rw-r--r-- | src/mainboard/google/asurada/romstage.c | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/src/mainboard/google/asurada/romstage.c b/src/mainboard/google/asurada/romstage.c new file mode 100644 index 0000000000..a0e0818e01 --- /dev/null +++ b/src/mainboard/google/asurada/romstage.c @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <arch/stages.h> +#include <console/console.h> +#include <fmap.h> +#include <soc/dramc_param.h> +#include <soc/emi.h> +#include <soc/mmu_operations.h> + +/* This must be defined in chromeos.fmd in same name and size. */ +#define CALIBRATION_REGION "RW_DDR_TRAINING" +#define CALIBRATION_REGION_SIZE 0x2000 + +_Static_assert(sizeof(struct dramc_param) <= CALIBRATION_REGION_SIZE, + "sizeof(struct dramc_param) exceeds " CALIBRATION_REGION); + +static bool read_calibration_data_from_flash(struct dramc_param *dparam) +{ + const size_t length = sizeof(*dparam); + size_t ret = fmap_read_area(CALIBRATION_REGION, dparam, length); + printk(BIOS_DEBUG, "read data from flash, ret=%#zx, length=%#zx\n", ret, length); + + return ret == length; +} + +static bool write_calibration_data_to_flash(const struct dramc_param *dparam) +{ + const size_t length = sizeof(*dparam); + size_t ret = fmap_overwrite_area(CALIBRATION_REGION, dparam, length); + printk(BIOS_DEBUG, "write data from flash, ret=%#zx, length=%#zx\n", ret, length); + + return ret == length; +} + +/* dramc_param is ~2K and too large to fit in stack. */ +static struct dramc_param dramc_parameter; + +static struct dramc_param_ops dparam_ops = { + .param = &dramc_parameter, + .read_from_flash = &read_calibration_data_from_flash, + .write_to_flash = &write_calibration_data_to_flash, +}; + +void platform_romstage_main(void) +{ + mt_mem_init(&dparam_ops); + mtk_mmu_after_dram(); +} |