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authorHung-Te Lin <hungte@chromium.org>2020-05-26 23:49:21 +0800
committerHung-Te Lin <hungte@chromium.org>2020-10-22 02:13:43 +0000
commitc47ed6e8c3106b243f6c1df23d21785bdf61bd10 (patch)
tree5cd983bdc2bc1d67e6fa1855136e4653c34e17a9 /src/mainboard/google/asurada/gpio.h
parent5ed4d63fe12b9dc744a15a76c136132cc42308db (diff)
mb/google/asurada: Add Chrome OS GPIOs
Add the Chrome OS specific GPIOs (WP, EC, H1, ...) GPIOs. BUG=None TEST=emerge-asurada coreboot; # also boots into emmc BRANCH=None Signed-off-by: Hung-Te Lin <hungte@chromium.org> Change-Id: Ieeeee88a09ae4c3af15e2ae93a29684d30dde493 Reviewed-on: https://review.coreboot.org/c/coreboot/+/46386 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/asurada/gpio.h')
-rw-r--r--src/mainboard/google/asurada/gpio.h20
1 files changed, 20 insertions, 0 deletions
diff --git a/src/mainboard/google/asurada/gpio.h b/src/mainboard/google/asurada/gpio.h
new file mode 100644
index 0000000000..90de583f77
--- /dev/null
+++ b/src/mainboard/google/asurada/gpio.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __MAINBOARD_GOOGLE_ASURADA_GPIO_H__
+#define __MAINBOARD_GOOGLE_ASURADA_GPIO_H__
+
+#include <soc/gpio.h>
+
+/* AP_FLASH_WP */
+#define GPIO_WP GPIO(EINT14)
+#define GPIO_EC_AP_INT GPIO(EINT5)
+#define GPIO_EC_IN_RW GPIO(ANT_SEL8)
+#define GPIO_H1_AP_INT GPIO(ANT_SEL9)
+/* SD Card Detection */
+#define GPIO_SD_CD GPIO(EINT17)
+/* AP_EC_WARM_RST_REQ */
+#define GPIO_RESET GPIO(CAM_PDN2)
+
+void setup_chromeos_gpios(void);
+
+#endif