diff options
| author | Hung-Te Lin <hungte@chromium.org> | 2020-05-26 23:49:21 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2020-10-22 02:13:43 +0000 |
| commit | c47ed6e8c3106b243f6c1df23d21785bdf61bd10 (patch) | |
| tree | 5cd983bdc2bc1d67e6fa1855136e4653c34e17a9 /src/mainboard/google/asurada/chromeos.c | |
| parent | 5ed4d63fe12b9dc744a15a76c136132cc42308db (diff) | |
mb/google/asurada: Add Chrome OS GPIOs
Add the Chrome OS specific GPIOs (WP, EC, H1, ...) GPIOs.
BUG=None
TEST=emerge-asurada coreboot; # also boots into emmc
BRANCH=None
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Change-Id: Ieeeee88a09ae4c3af15e2ae93a29684d30dde493
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46386
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/asurada/chromeos.c')
| -rw-r--r-- | src/mainboard/google/asurada/chromeos.c | 23 |
1 files changed, 21 insertions, 2 deletions
diff --git a/src/mainboard/google/asurada/chromeos.c b/src/mainboard/google/asurada/chromeos.c index 8f9fa5334c..a57392bc04 100644 --- a/src/mainboard/google/asurada/chromeos.c +++ b/src/mainboard/google/asurada/chromeos.c @@ -5,16 +5,35 @@ #include <gpio.h> #include <security/tpm/tis.h> +#include "gpio.h" + +void setup_chromeos_gpios(void) +{ + gpio_input(GPIO_WP); + gpio_input_pullup(GPIO_EC_AP_INT); + gpio_input_pullup(GPIO_EC_IN_RW); + gpio_input_pullup(GPIO_H1_AP_INT); + gpio_input_pullup(GPIO_SD_CD); + gpio_output(GPIO_RESET, 0); +} + void fill_lb_gpios(struct lb_gpios *gpios) { + struct lb_gpio chromeos_gpios[] = { + {GPIO_EC_IN_RW.id, ACTIVE_LOW, -1, "EC in RW"}, + {GPIO_EC_AP_INT.id, ACTIVE_LOW, -1, "EC interrupt"}, + {GPIO_H1_AP_INT.id, ACTIVE_HIGH, -1, "TPM interrupt"}, + {GPIO_SD_CD.id, ACTIVE_HIGH, -1, "SD card detect"}, + }; + lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } int get_write_protect_state(void) { - return 0; + return !gpio_get(GPIO_WP); } int tis_plat_irq_status(void) { - return 0; + return gpio_eint_poll(GPIO_H1_AP_INT); } |