diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-09-10 06:30:54 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-09-12 16:09:31 +0000 |
| commit | f7ca672118b4d14c1e3686728c115df7adc2ec1d (patch) | |
| tree | ae4290b8644a823e4e21109c7dcc38de830dab8e /src/mainboard/gizmosphere | |
| parent | f3ec5ed5559c59a63419f20246751e6f39225ef7 (diff) | |
AGESA boards: Clean up some includes
Change-Id: I84c70aa04ab556a3898d3525f7b9aab85812f61d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21475
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/gizmosphere')
| -rw-r--r-- | src/mainboard/gizmosphere/gizmo/mainboard.c | 10 | ||||
| -rw-r--r-- | src/mainboard/gizmosphere/gizmo2/mainboard.c | 8 |
2 files changed, 3 insertions, 15 deletions
diff --git a/src/mainboard/gizmosphere/gizmo/mainboard.c b/src/mainboard/gizmosphere/gizmo/mainboard.c index 98cafae738..baed5f028c 100644 --- a/src/mainboard/gizmosphere/gizmo/mainboard.c +++ b/src/mainboard/gizmosphere/gizmo/mainboard.c @@ -14,18 +14,14 @@ * GNU General Public License for more details. */ +#include <arch/io.h> #include <console/console.h> +#include <delay.h> #include <device/device.h> -#include <device/pci.h> -#include <arch/io.h> -#include <cpu/x86/msr.h> #include <device/pci_def.h> + #include <southbridge/amd/sb800/sb800.h> -#include <arch/acpi.h> -#include <northbridge/amd/agesa/BiosCallOuts.h> -#include <cpu/amd/mtrr.h> #include "SBPLATFORM.h" -#include <delay.h> void set_pcie_reset(void); void set_pcie_dereset(void); diff --git a/src/mainboard/gizmosphere/gizmo2/mainboard.c b/src/mainboard/gizmosphere/gizmo2/mainboard.c index ad4f9c9aa4..6a9db806e1 100644 --- a/src/mainboard/gizmosphere/gizmo2/mainboard.c +++ b/src/mainboard/gizmosphere/gizmo2/mainboard.c @@ -17,18 +17,10 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> -#include <arch/io.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> -#include <device/pci_def.h> -#include <arch/acpi.h> #include <southbridge/amd/agesa/hudson/pci_devs.h> #include <southbridge/amd/agesa/hudson/amd_pci_int_defs.h> #include <southbridge/amd/common/amd_pci_util.h> #include <northbridge/amd/agesa/family16kb/pci_devs.h> -#include <northbridge/amd/agesa/BiosCallOuts.h> -#include <northbridge/amd/agesa/state_machine.h> /*********************************************************** * These arrays set up the FCH PCI_INTR registers 0xC00/0xC01. |