diff options
author | Mike Banon <mikebdp2@gmail.com> | 2020-02-13 15:39:42 +0000 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-02-24 13:58:02 +0000 |
commit | 24c1f94258d52402494f17f6e34cd489009c01f9 (patch) | |
tree | 6a14aa36d19e3fa5156338170babe1235bed00b8 /src/mainboard/gizmosphere/gizmo2/romstage.c | |
parent | 541498be0a1921ee62b96bd07bc38af584c1e06e (diff) |
gizmosphere/gizmo2: Switch away from ROMCC_BOOTBLOCK
Warning: Not tested on hardware.
Signed-off-by: Mike Banon <mikebdp2@gmail.com>
Change-Id: Iad86755952204bb1a56ef341e626b0627a958467
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38868
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/gizmosphere/gizmo2/romstage.c')
-rw-r--r-- | src/mainboard/gizmosphere/gizmo2/romstage.c | 34 |
1 files changed, 0 insertions, 34 deletions
diff --git a/src/mainboard/gizmosphere/gizmo2/romstage.c b/src/mainboard/gizmosphere/gizmo2/romstage.c deleted file mode 100644 index 6312270712..0000000000 --- a/src/mainboard/gizmosphere/gizmo2/romstage.c +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2012 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <amdblocks/acpimmio.h> -#include <arch/io.h> -#include <device/pci_ops.h> -#include <northbridge/amd/agesa/state_machine.h> -#include <southbridge/amd/agesa/hudson/hudson.h> - -void board_BeforeAgesa(struct sysinfo *cb) -{ - /* For serial port option, plug-in card on LPC. */ - pci_devfn_t dev = PCI_DEV(0, 0x14, 3); - pci_write_config32(dev, 0x44, 0xff03ffd5); - - /* In Hudson RRG, PMIOxD2[5:4] is "Drive strength control for - * LpcClk[1:0]". To be consistent with Parmer, setting to 4mA - * even though the register is not documented in the Kabini BKDG. - * Otherwise the serial output is bad code. - */ - pm_io_write8(0xd2, 0); -} |